| Message ID | 20250407-imx-se-if-v15-4-e3382cecda01@nxp.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | firmware: imx: driver for NXP secure-enclave | expand |
On Mon, Apr 07, 2025 at 09:50:20PM +0530, Pankaj Gupta wrote: > Reserve 1MB of DDR memory region due to EdgeLock Enclave's hardware > limitation restricting access to DDR addresses from 0x80000000 > to 0xafffffff. > > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> > --- Reviewed-by: Frank Li <Frank.Li@nxp.com> > arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 12 +++++++++++- > 1 file changed, 11 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts > index 290a49bea2f7..10aaf02f8ea7 100644 > --- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts > +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts > @@ -1,6 +1,6 @@ > // SPDX-License-Identifier: (GPL-2.0+ OR MIT) > /* > - * Copyright 2021 NXP > + * Copyright 2021, 2025 NXP > */ > > /dts-v1/; > @@ -37,6 +37,12 @@ linux,cma { > linux,cma-default; > }; > > + ele_reserved: memory@90000000 { > + compatible = "shared-dma-pool"; > + reg = <0 0x90000000 0 0x100000>; > + no-map; > + }; > + > m33_reserved: noncacheable-section@a8600000 { > reg = <0 0xa8600000 0 0x1000000>; > no-map; > @@ -259,6 +265,10 @@ &usdhc0 { > status = "okay"; > }; > > +&hsm0 { > + memory-region = <&ele_reserved>; > +}; > + > &fec { > pinctrl-names = "default", "sleep"; > pinctrl-0 = <&pinctrl_enet>; > > -- > 2.43.0 >
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts index 290a49bea2f7..10aaf02f8ea7 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright 2021 NXP + * Copyright 2021, 2025 NXP */ /dts-v1/; @@ -37,6 +37,12 @@ linux,cma { linux,cma-default; }; + ele_reserved: memory@90000000 { + compatible = "shared-dma-pool"; + reg = <0 0x90000000 0 0x100000>; + no-map; + }; + m33_reserved: noncacheable-section@a8600000 { reg = <0 0xa8600000 0 0x1000000>; no-map; @@ -259,6 +265,10 @@ &usdhc0 { status = "okay"; }; +&hsm0 { + memory-region = <&ele_reserved>; +}; + &fec { pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_enet>;
Reserve 1MB of DDR memory region due to EdgeLock Enclave's hardware limitation restricting access to DDR addresses from 0x80000000 to 0xafffffff. Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> --- arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-)