From patchwork Mon Apr 7 14:51:55 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 14040924 Received: from mx.denx.de (mx.denx.de [89.58.32.78]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 34D001F2C5B for ; Mon, 7 Apr 2025 14:52:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=89.58.32.78 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744037551; cv=none; b=qOGu7uS1BcdXjr/PdUTO64zpxDEuJ94JzgHukpUW7s4xs4qFTDHyhm5eLO+OoSOlbvlNOOy3O8GzMiv8bIdacVwqkF8ELB/W3hUchr8Kb+dmcyZZrLqmYFK/g6JrXHQpOYzYfuxyGzPAfYz22cMP+Gre1Ztu8RxYuFHhHabFyss= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744037551; c=relaxed/simple; bh=GTAg8ZS5//3Scu1SQNGR6OwiYtUyRL3hUculuG1gMCs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=UxH5YbNia0smBoSSraZZn7IWtimQl0TiPKM33ipuq2QfwP6oo+UfBdhwBekOz69JaEnwky9HZyDBucq9RtMv9iZP+UXtcJZM6Wdm5sBzXFXxFaM/tvJCfVGFM9mNPj5ZXcfcf2uxRrq2VzBeY/lBZxXSW8gHtlMQKkieD6Z88CE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=denx.de; spf=pass smtp.mailfrom=denx.de; dkim=pass (2048-bit key) header.d=denx.de header.i=@denx.de header.b=g4f7sYDh; arc=none smtp.client-ip=89.58.32.78 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=denx.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=denx.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=denx.de header.i=@denx.de header.b="g4f7sYDh" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 815C9102EB9F8; Mon, 7 Apr 2025 16:52:26 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=mx-20241105; t=1744037548; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=aUW3bWC8382EvfUkw95lPkqbVqeF5AYyWjTegEB8Whg=; b=g4f7sYDhUSUF+0WUha9qTapNYlmFvtQFgLbDXuBSONASXMWCuqTO+3lfWPv4HAJ7AnG+Tx 4ifSrK3XySJT0AXG+g5sxEGEREwWIvbQ8oRf+95DPQUAc7EHsfBmbSgduIutzIU1RZBmzS Z2x+PBZ29Y3zmnuXMelfcQI2M4UQOsZ3G76gJW7FlSQjNCxZO4t5XDyOfcLBsZH2ocdA1q yl5VLlBnbK+oo3780N1GlJ2ZuLrXbpVcb9WwSPZOXI50VeEfxFYTKK1A5Vjd7f0u5gWa/Y BC4PVuuktf6w78RHxR/XG747HyFCdzQjMd9QRK4EUuDm5y4OUtwPrOxAkFCLLg== From: Lukasz Majewski To: Andrew Lunn , davem@davemloft.net, Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo Cc: Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Richard Cochran , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Stefan Wahren , Lukasz Majewski Subject: [net-next v4 3/5] ARM: dts: nxp: mxs: Adjust XEA board's DTS to support L2 switch Date: Mon, 7 Apr 2025 16:51:55 +0200 Message-Id: <20250407145157.3626463-4-lukma@denx.de> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250407145157.3626463-1-lukma@denx.de> References: <20250407145157.3626463-1-lukma@denx.de> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 The description is similar to the one used with the new CPSW driver. Signed-off-by: Lukasz Majewski Reviewed-by: Andrew Lunn --- Changes for v2: - Remove properties which are common for the imx28(7) SoC - Use mdio properties to perform L2 switch reset (avoid using deprecated properties) Changes for v3: - Replace IRQ_TYPE_EDGE_FALLING with IRQ_TYPE_LEVEL_LOW - Update comment regarding PHY interrupts s/AND/OR/g Changes for v4: - Use GPIO_ACTIVE_LOW instead of 0 in 'reset-gpios' - Replace port@[12] with ethernet-port@[12] --- arch/arm/boot/dts/nxp/mxs/imx28-xea.dts | 54 +++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts b/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts index 6c5e6856648a..280e5a79b787 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts @@ -5,6 +5,7 @@ */ /dts-v1/; +#include #include "imx28-lwe.dtsi" / { @@ -90,6 +91,59 @@ ®_usb_5v { gpio = <&gpio0 2 0>; }; +ð_switch { + pinctrl-names = "default"; + pinctrl-0 = <&mac0_pins_a>, <&mac1_pins_a>; + phy-supply = <®_fec_3v3>; + status = "okay"; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + mtip_port1: ethernet-port@1 { + reg = <1>; + label = "lan0"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + }; + + mtip_port2: ethernet-port@2 { + reg = <2>; + label = "lan1"; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-mode = "rmii"; + phy-handle = <ðphy1>; + }; + }; + + mdio_sw: mdio { + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; + reset-delay-us = <25000>; + reset-post-delay-us = <10000>; + + ethphy0: ethernet-phy@0 { + reg = <0>; + smsc,disable-energy-detect; + /* Both PHYs (i.e. 0,1) have the same, single GPIO, */ + /* line to handle both, their interrupts (OR'ed) */ + interrupt-parent = <&gpio4>; + interrupts = <13 IRQ_TYPE_LEVEL_LOW>; + }; + + ethphy1: ethernet-phy@1 { + reg = <1>; + smsc,disable-energy-detect; + interrupt-parent = <&gpio4>; + interrupts = <13 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + &spi2_pins_a { fsl,pinmux-ids = < MX28_PAD_SSP2_SCK__SSP2_SCK