mbox series

[00/12] ICL DSI CMD MODE

Message ID 1533730559-461-1-git-send-email-madhav.chauhan@intel.com (mailing list archive)
Headers show
Series ICL DSI CMD MODE | expand

Message

Chauhan, Madhav Aug. 8, 2018, 12:15 p.m. UTC
MIPI DSI supports video and command mode type of operations.
Command Mode refers to operation in which transactions primarily take
the form of sending commands and data to a peripheral such as a display
module, that incorporates a display controller.
The host processor indirectly controls activity at the peripheral by
sending commands, parameters and data to the display controller.

This series implement DSI command mode support for ICELAKE platform.

Patches are *not* tested and based on the following DSI patches published
on GITHUB: https://github.com/madhavchauhan/Intel-DSI-Driver

Madhav Chauhan (12):
  drm/i915/icl: Define utility pin ctrl register bits
  drm/i915/icl: Config utility pin for DSI
  drm/i915/icl: Define DSI cmd mode registers
  drm/i915/icl: DSI transcoder config for command mode
  drm/i915/icl: Define TE interrupt related bits
  drm/i915/icl: Find encoder for DSI command mode
  drm/i915/icl: Configure TE interrupts for DSI
  drm/i915/icl: Enable/disable TE interrupts
  drm/i915/icl: DSI TE interrupt handler
  drm/i915/icl: Unmask/Clear DSI TE interrupts
  drm/i915/icl: Send frame to DSI panel
  drm/i915/icl: Transcoder timings for command mode

 drivers/gpu/drm/i915/i915_irq.c  |  65 ++++++++++++++++++++-
 drivers/gpu/drm/i915/i915_reg.h  |  78 ++++++++++++++++++++++---
 drivers/gpu/drm/i915/icl_dsi.c   | 119 +++++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_drv.h |   3 +
 4 files changed, 255 insertions(+), 10 deletions(-)