From patchwork Wed Oct 31 13:35:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 10662629 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 864EC14E2 for ; Wed, 31 Oct 2018 13:15:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 737182ADA0 for ; Wed, 31 Oct 2018 13:15:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6622F2ADA6; Wed, 31 Oct 2018 13:15:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C07FE2ADA0 for ; Wed, 31 Oct 2018 13:15:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CEE386E2C8; Wed, 31 Oct 2018 13:15:11 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 146956E251 for ; Wed, 31 Oct 2018 13:15:10 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 31 Oct 2018 06:15:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,447,1534834800"; d="scan'208";a="100316477" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.25.28]) by fmsmga002.fm.intel.com with ESMTP; 31 Oct 2018 06:15:07 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Wed, 31 Oct 2018 19:05:29 +0530 Message-Id: <1540992931-26022-1-git-send-email-uma.shankar@intel.com> X-Mailer: git-send-email 1.9.1 Subject: [Intel-gfx] [v6 0/2] Enable Plane Input CSC for ICL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ville.syrjala@intel.com, maarten.lankhorst@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This patch series enables plane input csc feature for ICL. This is needed for YUV to RGB conversion on bottom 3 planes on ICL, other planes are handled in the legacy way using fixed function hardware. This series enables color conversion for Full Range YUV data, limited range handling will be done as a separate patch. v2: Separated the patch into 2 parts as per Maarten's comments. Addressed Ville and Maarten's review comment. v3: Redesigned the register macro definition as per Matt's comment. Addressed Maarten's review comment. v4: Added support for Limited Range Color Handling. v5: Fixed Matt and Maarten's review comments. v6: Added human readable matrix values for YUV to RGB Conversion along with just the bspec register values, as per Matt's suggestion. This has been verified and tested by Maarten and the change is working as expected. Uma Shankar (2): drm/i915/icl: Define Plane Input CSC Coefficient Registers drm/i915/icl: Enable Plane Input CSC for YUV to RGB Conversion drivers/gpu/drm/i915/i915_reg.h | 50 +++++++++++++++++ drivers/gpu/drm/i915/intel_color.c | 103 +++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_display.c | 23 ++++++-- drivers/gpu/drm/i915/intel_drv.h | 2 + 4 files changed, 172 insertions(+), 6 deletions(-)