From patchwork Mon Feb 11 09:26:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 10805289 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BAF1F6C2 for ; Mon, 11 Feb 2019 09:02:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A9F1B29DBE for ; Mon, 11 Feb 2019 09:02:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9DD9729DC0; Mon, 11 Feb 2019 09:02:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 57C1329DBE for ; Mon, 11 Feb 2019 09:02:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AC9FD6E21A; Mon, 11 Feb 2019 09:02:34 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8F9A36E21A for ; Mon, 11 Feb 2019 09:02:33 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Feb 2019 01:02:33 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,358,1544515200"; d="scan'208";a="113964095" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.25.28]) by orsmga007.jf.intel.com with ESMTP; 11 Feb 2019 01:02:30 -0800 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Mon, 11 Feb 2019 14:56:25 +0530 Message-Id: <1549877190-4509-1-git-send-email-uma.shankar@intel.com> X-Mailer: git-send-email 1.9.1 Subject: [Intel-gfx] [v8 0/5] Add support for Gen 11 pipe color features X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ville.syrjala@intel.com, maarten.lankhorst@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This patch series adds support for Gen11 pipe degamma, CSC and gamma hardware blocks. CRC checks are not working for 10bit gamma but works for 8bit pallete modes which seems to be due to some rounding errors in pipe. Also there is a corner case where Lut precision is increased to 3.16, hence its not possible to accurately represent 1.0 which will require 17 bits. Support for extending the ABI is already in discussion in below series: https://patchwork.freedesktop.org/patch/249771/ ToDo: Support for Multi Segmented Gamma will be added later. v2: Addressed Maarten's review comments and re-ordered the patch series. v3: Addressed Matt's review comments. Removed rmw patterns as suggested by Matt. v4: Addressed Matt's review comments. v5: Addressed Matt's, Ville and Jani Nikula's review comments. v6: Addressed Matt and Ville's review comments. Extended GLK degamma function and merged ICL degamma support to that. Handled pipe output csc separately along with regular pipe csc. Dropped gamma_mode removal patch as Ville is using that to refactor the gamma handling. This series may need a rebase on top of Ville's below series: https://patchwork.freedesktop.org/series/55081/. v7: Rebased the series on top of Ville's color management cleanup and state refactoring series. Addressed Matt's review comments and aligned state handling as per atomic design. v8: Fixed macro alignment and some checkpatch warnings. Uma Shankar (5): drm/i915/glk: Fix degamma lut programming drm/i915/icl: Add icl pipe degamma and gamma support drm/i915/icl: Enable ICL Pipe CSC block drm/i915/icl: Enable pipe output csc drm/i915/icl: Add degamma and gamma lut size to gen11 caps drivers/gpu/drm/i915/i915_pci.c | 5 +- drivers/gpu/drm/i915/i915_reg.h | 86 +++++++++++++++++++--- drivers/gpu/drm/i915/intel_color.c | 141 ++++++++++++++++++++++++++++++------- drivers/gpu/drm/i915/intel_drv.h | 3 + 4 files changed, 199 insertions(+), 36 deletions(-)