[v4,0/8] i915 vgpu PV to improve vgpu performance

Message

Xiaolin Zhang March 29, 2019, 1:32 p.m. UTC

To improve vgpu performance, it could implement some PV optimization
such as to reduce the mmio access trap numbers or eliminate certain piece
of HW emulation within guest driver to reduce vm exit/vm enter cost.

the solutions in this patch set are implemented two PV optimizations based
on the shared memory region between guest and GVTg for data communication.
The shared memory region is allocated by guest driver and this
region's memory guest physical address will be passed to GVTg through
PVINFO register and later GVTg can access this region directly without
trap cost to achieve data exchange purpose between guest and GVTg.

in this patch set, 2 kind of PV optimization implemented controlled by
pv_caps PVINO register with different pv bit.
1. workload PV submission (context submission): reduce 4 traps to 1 trap
and eliminated execlists HW behaviour emulation.
2. ppgtt PV update: eliminate the cost of ppgtt write protection.

based on the experiment, for small workloads, specifally, glxgears with
vblank_mode off, the average performance gain on single vgpu is 30~50%.
for large workload such as media and 3D, the average performance gain
is about 4%. 

based on the PV mechanism, it could achive more vgpu feature optimization
such as globle GTT update, display plane and water mark update.

v0: RFC patch set
v1: addressed RFC review comments
v2: addressed v1 review comments, added pv callbacks for pv operations
v3:
1. addressed v2 review comments, removed pv callbacks code duplication in
v2 and unified pv calls under g2v notification register. different g2v pv
notifications defined.
2. dropped pv master irq feature due to hard conflict with recnet i915
change and take time to rework.
v4:
1. addressed v3 review comments.
2. extended workload PV submission by skip execlists HW behaviour emulation
and context switch interrupt injection.  

Xiaolin Zhang (8):
  drm/i915: introduced vgpu pv capability
  drm/i915: vgpu shared memory setup for pv optimization
  drm/i915: vgpu ppgtt update pv optimization
  drm/i915: vgpu context submission pv optimization
  drm/i915/gvt: GVTg handle pv_caps PVINFO register
  drm/i915/gvt: GVTg handle shared_page setup
  drm/i915/gvt: GVTg support ppgtt pv optimization
  drm/i915/gvt: GVTg support context submission pv optimization

 drivers/gpu/drm/i915/gvt/execlist.c |   6 +
 drivers/gpu/drm/i915/gvt/gtt.c      | 317 +++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/gvt/gtt.h      |   9 +
 drivers/gpu/drm/i915/gvt/gvt.h      |  10 +-
 drivers/gpu/drm/i915/gvt/handlers.c |  63 ++++++-
 drivers/gpu/drm/i915/gvt/vgpu.c     |  31 ++++
 drivers/gpu/drm/i915/i915_drv.h     |   6 +-
 drivers/gpu/drm/i915/i915_gem.c     |   3 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c |   9 +-
 drivers/gpu/drm/i915/i915_gem_gtt.h |   8 +
 drivers/gpu/drm/i915/i915_irq.c     |   2 +
 drivers/gpu/drm/i915/i915_pvinfo.h  |  12 +-
 drivers/gpu/drm/i915/i915_vgpu.c    | 323 +++++++++++++++++++++++++++++++++++-
 drivers/gpu/drm/i915/i915_vgpu.h    |  52 ++++++
 drivers/gpu/drm/i915/intel_lrc.c    |   3 +
 15 files changed, 845 insertions(+), 9 deletions(-)

Comments

Chris Wilson March 29, 2019, 4:05 p.m. UTC | #1

Quoting Xiaolin Zhang (2019-03-29 13:32:36)
> To improve vgpu performance, it could implement some PV optimization
> such as to reduce the mmio access trap numbers or eliminate certain piece
> of HW emulation within guest driver to reduce vm exit/vm enter cost.

Where's the CI for this patchset? The lack of interrupts to drive
submission should have shown up, and if not, we need some testcases to
make sure it doesn't happen again. Everytime I see a gvt patch, I ask if
we can get some coverage in intel-gfx-ci :)
-Chris

Xiaolin Zhang April 11, 2019, 5:54 a.m. UTC | #2

On 03/30/2019 12:05 AM, Chris Wilson wrote:
> Quoting Xiaolin Zhang (2019-03-29 13:32:36)
>> To improve vgpu performance, it could implement some PV optimization
>> such as to reduce the mmio access trap numbers or eliminate certain piece
>> of HW emulation within guest driver to reduce vm exit/vm enter cost.
> Where's the CI for this patchset? The lack of interrupts to drive
> submission should have shown up, and if not, we need some testcases to
> make sure it doesn't happen again. Everytime I see a gvt patch, I ask if
> we can get some coverage in intel-gfx-ci :)
> -Chris
>
The CI for this patchset was not generated due to build failure. will
try next version to avoid build issue by rebasing to tip of branch.