From patchwork Tue Sep 17 05:48:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaolin Zhang X-Patchwork-Id: 11148059 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 502FE16B1 for ; Tue, 17 Sep 2019 05:48:37 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 383DD21848 for ; Tue, 17 Sep 2019 05:48:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 383DD21848 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 09ED36E10C; Tue, 17 Sep 2019 05:48:36 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2D5AE6E10C; Tue, 17 Sep 2019 05:48:35 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Sep 2019 22:48:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,515,1559545200"; d="scan'208";a="386441142" Received: from xzhan34-mobl3.bj.intel.com ([10.238.154.70]) by fmsmga005.fm.intel.com with ESMTP; 16 Sep 2019 22:48:32 -0700 From: Xiaolin Zhang To: intel-gvt-dev@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Date: Tue, 17 Sep 2019 13:48:11 +0800 Message-Id: <1568699301-2799-1-git-send-email-xiaolin.zhang@intel.com> X-Mailer: git-send-email 2.7.4 Subject: [Intel-gfx] [PATCH v10 0/9] i915 vgpu PV to improve vgpu performance X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: zhenyu.z.wang@intel.com, hang.yuan@intel.com, zhiyuan.lv@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To improve vgpu performance, it could implement some PV optimization such as to reduce the mmio access trap numbers or eliminate certain piece of HW emulation within guest driver to reduce vm exit/vm enter cost. the solutions in this patch set are implemented two PV optimizations based on the shared memory region between guest and GVTg for data communication. The shared memory region is allocated by guest driver and this region's memory guest physical address will be passed to GVTg through PVINFO register and later GVTg can access this region directly without trap cost to achieve data exchange purpose between guest and GVTg. in this patch set, 2 kind of PV optimization implemented controlled by pv_caps PVINO register with different pv bit. 1. workload PV submission (context submission): reduce 4 traps to 1 trap and eliminated execlists HW behaviour emulation. 2. ppgtt PV update: eliminate the cost of ppgtt write protection. based on the experiment, for small workloads, specifally, glxgears with vblank_mode off, the average performance gain on single vgpu is 30~50%. for large workload such as media and 3D, the average performance gain is about 4%. based on the PV mechanism, it could achive more vgpu feature optimization such as globle GTT update, display plane and water mark update. v0: RFC patch set v1: addressed RFC review comments v2: addressed v1 review comments, added pv callbacks for pv operations v3: 1. addressed v2 review comments, removed pv callbacks code duplication in v2 and unified pv calls under g2v notification register. different g2v pv notifications defined. 2. dropped pv master irq feature due to hard conflict with recnet i915 change and take time to rework. v4: 1. addressed v3 review comments. 2. extended workload PV submission by skip execlists HW behaviour emulation and context switch interrupt injection. v5: 1. addressed v4 review comments from Chris for pv submission. 2. per-engine communication between PV guest and host. v6: 1. addressed v5 review comments from Chris for pv submission. 2. addressed v5 review comments from Zhenyu for PV version support. v7: 1. addessed v6 review comments from Chris starting to use pv cmd buffer communication between pv guest and GVT. v8: addressed v7 review comments from Chris to refine pv submssion code. v9: refined PV user-facing message and to free PV shared memory in i915_destroy_vgpu. v10: rebased to 5.3.0-rc8 and conducted the IGT BAT test and i915 live test with PV feature. No regression introduced by PV features. for IGT BAT test (fast-feedback.testlist), there are 225 cases in total (162 pass, 12 fail, 42 skip) for both vGPU with/without PV features. for i915 live test, PV features do not bring regression as well. there is a number of cases failed for vGPU live test which include intel_workarounds_live_selftests, intel_hangcheck_live_selftests, igt_vm_isolation, i915_gem_object_blt_live_selftests, preempt, live_virtual_* and required further analysis, not contributed by the PV patches. Xiaolin Zhang (9): drm/i915: introduced vgpu pv capability drm/i915: vgpu shared memory setup for pv optimization drm/i915: vgpu pv command buffer support drm/i915: vgpu ppgtt update pv optimization drm/i915: vgpu context submission pv optimization drm/i915/gvt: GVTg handle pv_caps PVINFO register drm/i915/gvt: GVTg handle shared_page setup drm/i915/gvt: GVTg support ppgtt pv optimization drm/i915/gvt: GVTg support context submission pv optimization drivers/gpu/drm/i915/Makefile | 2 +- drivers/gpu/drm/i915/gt/intel_lrc.c | 12 +- drivers/gpu/drm/i915/gvt/execlist.c | 6 + drivers/gpu/drm/i915/gvt/gtt.c | 298 ++++++++++++++++++++ drivers/gpu/drm/i915/gvt/gtt.h | 11 + drivers/gpu/drm/i915/gvt/gvt.h | 12 +- drivers/gpu/drm/i915/gvt/handlers.c | 181 +++++++++++- drivers/gpu/drm/i915/gvt/vgpu.c | 50 ++++ drivers/gpu/drm/i915/i915_debugfs.c | 2 + drivers/gpu/drm/i915/i915_drv.c | 2 + drivers/gpu/drm/i915/i915_drv.h | 6 +- drivers/gpu/drm/i915/i915_gem.c | 3 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 10 +- drivers/gpu/drm/i915/i915_gem_gtt.h | 8 + drivers/gpu/drm/i915/i915_pvinfo.h | 9 +- drivers/gpu/drm/i915/i915_vgpu.c | 426 ++++++++++++++++++++++++++++- drivers/gpu/drm/i915/i915_vgpu.h | 133 +++++++++ drivers/gpu/drm/i915/intel_pv_submission.c | 300 ++++++++++++++++++++ 18 files changed, 1455 insertions(+), 16 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_pv_submission.c