From patchwork Wed Aug 29 19:10:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wajdeczko X-Patchwork-Id: 10580765 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2B2CB174A for ; Wed, 29 Aug 2018 19:11:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1D5052BB00 for ; Wed, 29 Aug 2018 19:11:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 11A352BB04; Wed, 29 Aug 2018 19:11:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9BB612BB00 for ; Wed, 29 Aug 2018 19:11:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 955F06E57E; Wed, 29 Aug 2018 19:11:14 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 148D56E57E for ; Wed, 29 Aug 2018 19:11:14 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Aug 2018 12:11:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,304,1531810800"; d="scan'208";a="85562352" Received: from irvmail001.ir.intel.com ([163.33.26.43]) by fmsmga001.fm.intel.com with ESMTP; 29 Aug 2018 12:11:11 -0700 Received: from mwajdecz-MOBL1.ger.corp.intel.com (mwajdecz-mobl1.ger.corp.intel.com [172.28.181.6]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id w7TJB9RG021381; Wed, 29 Aug 2018 20:11:09 +0100 From: Michal Wajdeczko To: intel-gfx@lists.freedesktop.org Date: Wed, 29 Aug 2018 19:10:34 +0000 Message-Id: <20180829191056.63760-1-michal.wajdeczko@intel.com> X-Mailer: git-send-email 2.10.1.windows.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 00/21] New GuC ABI X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rodrigo Vivi , Sujaritha Sundaresan Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This series introduces new Gen11 GuC ABI. Unfortunatelly this new ABI is not backward compatible, so for a while we will only support HuC authentication for pre-Gen11 GuC until new firmwares will be released. Note: To pass CI.BAT on machines with GuC, HAX will modify forced modparam to disable GuC submission on those machines. Cc: Joonas Lahtinen Cc: Rodrigo Vivi Cc: Daniele Ceraolo Spurio Cc: Michel Thierry Cc: John Spotswood Cc: Vinay Belgaumkar Cc: Tony Ye Cc: Anusha Srivatsa Cc: Jeff Mcgee Cc: Antonio Argenziano Cc: Sujaritha Sundaresan Michal Wajdeczko (21): drm/i915/guc: Update GuC power domain states drm/i915/guc: Don't allow GuC submission on pre-Gen11 drm/i915/guc: Simplify preparation of GuC parameter block drm/i915/guc: Support dual Gen9/Gen11 parameters block drm/i915/guc: Update sample-forcewake command drm/i915/guc: Use guc_class instead of engine_class in fw interface drm/i915/guc: New GuC ADS object definition drm/i915/guc: Make use of the SW counter field in the context descriptor drm/i915/guc: New GuC IDs based on engine class and instance drm/i915: Add hooks for (per-engine) context allocation/update/free drm/i915/guc: New GuC stage descriptors drm/i915/guc: New GuC workqueue item submission mechanism drm/i915/guc: Add support for resume-parsing wq item drm/i915/guc: New reset-engine command drm/i915/guc: Support for extended GuC notification messages drm/i915/guc: New engine-reset-complete message drm/i915/guc: New GuC interrupt register for Gen11 drm/i915/guc: New GuC scratch registers for Gen11 drm/i915/huc: New HuC status register for Gen11 drm/i915/guc: Enable command transport buffers for Gen11 HAX Don't enable GuC submission on pre-Gen11 even if forced drivers/gpu/drm/i915/i915_debugfs.c | 9 +- drivers/gpu/drm/i915/i915_drv.h | 26 ++- drivers/gpu/drm/i915/i915_gem_context.c | 11 +- drivers/gpu/drm/i915/i915_gem_context.h | 2 + drivers/gpu/drm/i915/i915_pci.c | 1 + drivers/gpu/drm/i915/i915_reg.h | 2 + drivers/gpu/drm/i915/i915_utils.h | 12 + drivers/gpu/drm/i915/intel_engine_cs.c | 21 +- drivers/gpu/drm/i915/intel_guc.c | 249 ++++++++++++++++----- drivers/gpu/drm/i915/intel_guc.h | 9 +- drivers/gpu/drm/i915/intel_guc_ads.c | 91 ++++++-- drivers/gpu/drm/i915/intel_guc_ct.c | 5 +- drivers/gpu/drm/i915/intel_guc_fwif.h | 264 +++++++++++++--------- drivers/gpu/drm/i915/intel_guc_reg.h | 7 + drivers/gpu/drm/i915/intel_guc_submission.c | 329 +++++++++++++++++++++------- drivers/gpu/drm/i915/intel_huc.c | 58 ++++- drivers/gpu/drm/i915/intel_lrc.c | 29 ++- drivers/gpu/drm/i915/intel_ringbuffer.h | 4 + drivers/gpu/drm/i915/intel_uc.c | 21 ++ drivers/gpu/drm/i915/selftests/intel_guc.c | 2 +- 20 files changed, 863 insertions(+), 289 deletions(-)