| Message ID | 20181113143535.27741-1-tvrtko.ursulin@linux.intel.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Per context dynamic (sub)slice power-gating | expand |
Quoting Tvrtko Ursulin (2018-11-13 14:35:29) > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > Just a resend since almost two months have passed since the last one and there > were some rebases needed due underlying code changes. > > Nothing major to warrant re-requesting the reviews, or in other words, the > series is still fully reviewed. And looks good. Nothing looked silly or out of place in re-reading the mechanics. -Chris
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Just a resend since almost two months have passed since the last one and there were some rebases needed due underlying code changes. Nothing major to warrant re-requesting the reviews, or in other words, the series is still fully reviewed. Lionel Landwerlin (2): drm/i915: Record the sseu configuration per-context & engine drm/i915/perf: lock powergating configuration to default when active Tvrtko Ursulin (4): drm/i915/execlists: Move RPCS setup to context pin drm/i915: Add timeline barrier support drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only) drm/i915/icl: Support co-existence between per-context SSEU and OA drivers/gpu/drm/i915/i915_drv.h | 14 + drivers/gpu/drm/i915/i915_gem_context.c | 343 +++++++++++++++++- drivers/gpu/drm/i915/i915_gem_context.h | 10 + drivers/gpu/drm/i915/i915_perf.c | 13 +- drivers/gpu/drm/i915/i915_request.c | 13 + drivers/gpu/drm/i915/i915_request.h | 10 + drivers/gpu/drm/i915/i915_timeline.c | 3 + drivers/gpu/drm/i915/i915_timeline.h | 27 ++ drivers/gpu/drm/i915/intel_lrc.c | 100 +++-- drivers/gpu/drm/i915/intel_lrc.h | 2 + .../gpu/drm/i915/selftests/mock_timeline.c | 2 + include/uapi/drm/i915_drm.h | 43 +++ 12 files changed, 543 insertions(+), 37 deletions(-)