Message ID | 20181130113201.13007-1-tvrtko.ursulin@linux.intel.com (mailing list archive) |
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Headers | show
Return-Path: <intel-gfx-bounces@lists.freedesktop.org> Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5F59713B0 for <patchwork-intel-gfx@patchwork.kernel.org>; Fri, 30 Nov 2018 11:32:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4919C2FF87 for <patchwork-intel-gfx@patchwork.kernel.org>; Fri, 30 Nov 2018 11:32:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 371372FF8C; Fri, 30 Nov 2018 11:32:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D18CA2FF87 for <patchwork-intel-gfx@patchwork.kernel.org>; Fri, 30 Nov 2018 11:32:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B08E56E5F0; Fri, 30 Nov 2018 11:32:10 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4F7F86E5F0 for <Intel-gfx@lists.freedesktop.org>; Fri, 30 Nov 2018 11:32:09 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Nov 2018 03:32:08 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,298,1539673200"; d="scan'208";a="96250377" Received: from bmolloy-mobl.ger.corp.intel.com (HELO localhost.localdomain) ([10.252.10.213]) by orsmga006.jf.intel.com with ESMTP; 30 Nov 2018 03:32:08 -0800 From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> To: Intel-gfx@lists.freedesktop.org Date: Fri, 30 Nov 2018 11:31:53 +0000 Message-Id: <20181130113201.13007-1-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 0/8] Restore workarounds after engine reset and unify their handling X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development <intel-gfx.lists.freedesktop.org> List-Unsubscribe: <https://lists.freedesktop.org/mailman/options/intel-gfx>, <mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe> List-Archive: <https://lists.freedesktop.org/archives/intel-gfx> List-Post: <mailto:intel-gfx@lists.freedesktop.org> List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help> List-Subscribe: <https://lists.freedesktop.org/mailman/listinfo/intel-gfx>, <mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org> X-Virus-Scanned: ClamAV using ClamSMTP |
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Restore workarounds after engine reset and unify their handling
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From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> First two patches in this series fix losing of workarounds after engine reset (https://bugzilla.freedesktop.org/show_bug.cgi?id=107945) which started happening after 59b449d5c82a ("drm/i915: Split out functions for different kinds of workarounds"). But since it was discovered to be unsafe to simply re-apply all of them, against a possibly active GPU, and potentially from IRQ context, the approach taken was to split GT workarounds and per-engine workarounds. Latter so far contain the ones living in the 0x2xxx and 0xbxxx range, which were empirically shown to be lost after RCS reset. This way only a smaller set of affected workarounds can be applied after engine resetm, which is done with irq safe read-modify-write cycle. The series is structured like this so first two patches are as standalone as possible so it is easy (easier) to backport them. The rest of the series cleans up the whole workaround handling by moving all four classes of them to a common framework. Tvrtko Ursulin (8): drm/i915: Record GT workarounds in a list drm/i915: Introduce per-engine workarounds drm/i915: Verify GT workaround state at runtime drm/i915: Verify engine workaround state at runtime drm/i915/selftests: Add tests for GT and engine workaround verification drm/i915: Move register white-listing to the common workaround framework drm/i915: Fuse per-context workaround handling with the common framework drm/i915: Trim unused workaround list entries drivers/gpu/drm/i915/i915_debugfs.c | 11 +- drivers/gpu/drm/i915/i915_drv.c | 8 + drivers/gpu/drm/i915/i915_drv.h | 18 +- drivers/gpu/drm/i915/i915_gem.c | 6 + drivers/gpu/drm/i915/i915_gem_context.c | 6 +- drivers/gpu/drm/i915/intel_engine_cs.c | 3 + drivers/gpu/drm/i915/intel_lrc.c | 5 + drivers/gpu/drm/i915/intel_ringbuffer.h | 3 + drivers/gpu/drm/i915/intel_workarounds.c | 896 +++++++++++------- drivers/gpu/drm/i915/intel_workarounds.h | 33 +- .../drm/i915/selftests/intel_workarounds.c | 130 ++- 11 files changed, 726 insertions(+), 393 deletions(-)