From patchwork Wed Mar 6 19:30:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwan-gyeong Mun X-Patchwork-Id: 10841669 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B950B17E9 for ; Wed, 6 Mar 2019 19:31:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A37DD2EBD4 for ; Wed, 6 Mar 2019 19:31:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8C6772EB97; Wed, 6 Mar 2019 19:31:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B08242EB97 for ; Wed, 6 Mar 2019 19:31:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B4F706E184; Wed, 6 Mar 2019 19:31:07 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id E59886E184 for ; Wed, 6 Mar 2019 19:31:05 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Mar 2019 11:31:05 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,448,1544515200"; d="scan'208";a="326035297" Received: from helsinki.fi.intel.com ([10.237.66.164]) by fmsmga005.fm.intel.com with ESMTP; 06 Mar 2019 11:31:03 -0800 From: Gwan-gyeong Mun To: intel-gfx@lists.freedesktop.org Date: Wed, 6 Mar 2019 21:30:56 +0200 Message-Id: <20190306193102.306-1-gwan-gyeong.mun@intel.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Subject: [Intel-gfx] [RFC v4 0/6] drm/i915/dp: Preliminary support for DP YCbCr4:2:0 outputs X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP On Gen 11 platform, to enable resolutions like 5K@120 (or higher) we need to use DSC (DP 1.4) or YCbCr4:2:0 (DP 1.3 or 1.4) on DP. In order to support YCbCr4:2:0 on DP we need to program YCBCR 4:2:0 to MSA and VSC SDP. This patches are RFC patches that add a VSC structure for handling Pixel Encoding/Colorimetry Formats and program YCBCR 4:2:0 to MSA and VSC SDP. This is currently not tested, but I wanted to get some inputs on this approach. The idea of a scaling (RGB -> YCbCr4:4:4 -> YCbCr 4:2:0) is to follow the same approach used in YCbCr 4:2:0 on HDMI. v2: Addressed Maarten's review comments, fixed minor coding and block comment style. And reordered a first patch ("drm/i915/dp: Support DP ports YUV 4:2:0 output to GEN11") as a last patch. v3: Addressed Ville's review comments. Style fixed with few naming. If lscon is active, it makes not to call intel_dp_ycbcr420_config() to avoid to clobber of lspcon_ycbcr420_config() routine. And it move the 420_only check into the intel_dp_ycbcr420_config(). Remove a changing of pipe_bpp on intel_ddi_set_pipe_settings(). Because the pipe is running at the full bpp, keep pipe_bpp as RGB even though YCbCr 4:2:0 output format is used. Add a link bandwidth computation for YCbCr4:2:0 output format. v4: Fix uninitialized return value which is reported by Dan Carpenter. Gwan-gyeong Mun (6): drm/i915/dp: Add a config function for YCBCR420 outputs drm: Add a VSC structure for handling Pixel Encoding/Colorimetry Formats drm/i915/dp: Program VSC Header and DB for Pixel Encoding/Colorimetry Format drm/i915/dp: Add a support of YCBCR 4:2:0 to DP MSA drm/i915/dp: Change a link bandwidth computation for DP YCbCr 4:2:0 output drm/i915/dp: Support DP ports YUV 4:2:0 output to GEN11 drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_ddi.c | 9 ++ drivers/gpu/drm/i915/intel_dp.c | 179 +++++++++++++++++++++++++++++-- drivers/gpu/drm/i915/intel_drv.h | 2 + include/drm/drm_dp_helper.h | 17 +++ 5 files changed, 200 insertions(+), 8 deletions(-)