[v5,0/5] GEN8+ GPU Watchdog Reset Support

Message

Santa, Carlos March 22, 2019, 11:41 p.m. UTC

This is a rebased on the original patch series from Michel Thierry:
https://patchwork.freedesktop.org/series/21868

Note that this series is only limited to the GPU Watchdog timeout for
execlists as it leaves out support for GuC based submissions for later.

PATCH v5 of this series was tested from userspace through an IGT
test gem_watchdog --run-subtest basic-bsd1 that is is not in upstream
yet.

The corresponding changes on the i965 media userspace are also under
review: https://github.com/intel/intel-vaapi-driver/pull/429/files

Michel Thierry (5):
  drm/i915: Add engine reset count in get-reset-stats ioctl
  drm/i915: Watchdog timeout: IRQ handler for gen8+
  drm/i915: Watchdog timeout: Ringbuffer command emission for gen8+
  drm/i915: Watchdog timeout: DRM kernel interface to set the timeout
  drm/i915: Watchdog timeout: Include threshold value in error state

 drivers/gpu/drm/i915/i915_drv.h            |   5 +
 drivers/gpu/drm/i915/i915_gem_context.c    | 162 ++++++++++++++++++++-
 drivers/gpu/drm/i915/i915_gpu_error.c      |  14 +-
 drivers/gpu/drm/i915/i915_gpu_error.h      |   5 +
 drivers/gpu/drm/i915/i915_irq.c            |  14 +-
 drivers/gpu/drm/i915/i915_reg.h            |   6 +
 drivers/gpu/drm/i915/i915_reset.c          |  20 +++
 drivers/gpu/drm/i915/i915_reset.h          |   6 +
 drivers/gpu/drm/i915/intel_context_types.h |   4 +
 drivers/gpu/drm/i915/intel_engine_cs.c     |   3 +
 drivers/gpu/drm/i915/intel_engine_types.h  |  22 ++-
 drivers/gpu/drm/i915/intel_hangcheck.c     |  11 +-
 drivers/gpu/drm/i915/intel_lrc.c           | 141 +++++++++++++++++-
 drivers/gpu/drm/i915/intel_lrc.h           |   2 +
 include/uapi/drm/i915_drm.h                |  21 +++
 15 files changed, 410 insertions(+), 26 deletions(-)