mbox series

[0/4] Perma-pin uC firmware and re-enable global reset

Message ID 20190409213102.30124-1-fernando.pacheco@intel.com (mailing list archive)
Headers show
Series Perma-pin uC firmware and re-enable global reset | expand

Message

Fernando Pacheco April 9, 2019, 9:30 p.m. UTC 
The intent is to move the GuC and HuC firmware images to the
top of the address space. This portion is inaccessible during
normal GuC operations and should be relatively safe to house
both firmware images. By making the move we can re-enable the
full gpu reset with GuC enabled.

Placing the firmware images above GUC_GGTT_TOP was discussed
previously here:
	https://patchwork.freedesktop.org/patch/273616/

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Fernando Pacheco (4):
  drm/i915/uc: Rename uC firmware init function
  drm/i915/uc: Reserve upper range of GGTT
  drm/i915/uc: Place uC firmware in upper range of GGTT
  Revert "drm/i915/guc: Disable global reset"

 drivers/gpu/drm/i915/i915_gem.c     |  2 +
 drivers/gpu/drm/i915/i915_gem_gtt.c | 25 +++++++-
 drivers/gpu/drm/i915/i915_gem_gtt.h |  1 +
 drivers/gpu/drm/i915/i915_reset.c   |  3 -
 drivers/gpu/drm/i915/intel_guc.c    |  9 ++-
 drivers/gpu/drm/i915/intel_guc.h    | 11 ++++
 drivers/gpu/drm/i915/intel_guc_fw.c | 45 +++++++++++---
 drivers/gpu/drm/i915/intel_guc_fw.h |  3 +
 drivers/gpu/drm/i915/intel_huc.c    | 72 +++++++++++++++++-----
 drivers/gpu/drm/i915/intel_huc.h    |  4 ++
 drivers/gpu/drm/i915/intel_huc_fw.c | 82 ++++++++++++++++++++----
 drivers/gpu/drm/i915/intel_huc_fw.h |  3 +
 drivers/gpu/drm/i915/intel_uc.c     | 39 ++++++++++--
 drivers/gpu/drm/i915/intel_uc.h     |  1 +
 drivers/gpu/drm/i915/intel_uc_fw.c  | 96 ++++++++++++++++++++---------
 drivers/gpu/drm/i915/intel_uc_fw.h  | 15 ++++-
 16 files changed, 329 insertions(+), 82 deletions(-)