[i-g-t,00/15] Remaining bits of Virtual Engine tooling

Message ID	20190522155720.28723-1-tvrtko.ursulin@linux.intel.com (mailing list archive)
Headers	show Return-Path: <intel-gfx-bounces@lists.freedesktop.org> From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> To: igt-dev@lists.freedesktop.org Date: Wed, 22 May 2019 16:57:05 +0100 Message-Id: <20190522155720.28723-1-tvrtko.ursulin@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH i-g-t 00/15] Remaining bits of Virtual Engine tooling Precedence: list Cc: Intel-gfx@lists.freedesktop.org Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>
Series	Remaining bits of Virtual Engine tooling \| expand [i-g-t,00/15] Remaining bits of Virtual Engine tooling [i-g-t,01/15] gem_wsim: Engine map support [i-g-t,02/15] gem_wsim: Save some lines by changing to implicit NULL checking [i-g-t,03/15] gem_wsim: Compact int command parsing with a macro [i-g-t,04/15] gem_wsim: Engine map load balance command [i-g-t,05/15] gem_wsim: Engine bond command [i-g-t,06/15] gem_wsim: Some more example workloads [i-g-t,07/15] gem_wsim: Infinite batch support [i-g-t,08/15] gem_wsim: Command line switch for specifying low slice count workloads [i-g-t,09/15] gem_wsim: Per context SSEU control [i-g-t,10/15] gem_wsim: Allow RCS virtual engine with SSEU control [i-g-t,11/15] gem_wsim: Consolidate engine assignments into helpers [i-g-t,12/15] gem_wsim: Discover engines [i-g-t,13/15] gem_wsim: Support Icelake parts [i-g-t,14/15] gem_wsim: Fix prng usage [i-g-t,15/15] gem_wsim: Allow random seed control

Message ID

20190522155720.28723-1-tvrtko.ursulin@linux.intel.com (mailing list archive)

Headers

From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: igt-dev@lists.freedesktop.org
Date: Wed, 22 May 2019 16:57:05 +0100
Message-Id: <20190522155720.28723-1-tvrtko.ursulin@linux.intel.com>
MIME-Version: 1.0
Subject: [Intel-gfx] [PATCH i-g-t 00/15] Remaining bits of Virtual Engine
 tooling
Precedence: list
Cc: Intel-gfx@lists.freedesktop.org
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: base64
Errors-To: intel-gfx-bounces@lists.freedesktop.org
Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>

Series

Remaining bits of Virtual Engine tooling | expand

Message

Tvrtko Ursulin May 22, 2019, 3:57 p.m. UTC

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Yet unmerged work with five unreviewed patches.

Tvrtko Ursulin (15):
  gem_wsim: Engine map support
  gem_wsim: Save some lines by changing to implicit NULL checking
  gem_wsim: Compact int command parsing with a macro
  gem_wsim: Engine map load balance command
  gem_wsim: Engine bond command
  gem_wsim: Some more example workloads
  gem_wsim: Infinite batch support
  gem_wsim: Command line switch for specifying low slice count workloads
  gem_wsim: Per context SSEU control
  gem_wsim: Allow RCS virtual engine with SSEU control
  gem_wsim: Consolidate engine assignments into helpers
  gem_wsim: Discover engines
  gem_wsim: Support Icelake parts
  gem_wsim: Fix prng usage
  gem_wsim: Allow random seed control

 benchmarks/gem_wsim.c                       | 1020 ++++++++++++++++---
 benchmarks/wsim/README                      |  122 ++-
 benchmarks/wsim/frame-split-60fps.wsim      |   18 +
 benchmarks/wsim/high-composited-game.wsim   |   11 +
 benchmarks/wsim/media-1080p-player.wsim     |    5 +
 benchmarks/wsim/medium-composited-game.wsim |    9 +
 6 files changed, 1022 insertions(+), 163 deletions(-)
 create mode 100644 benchmarks/wsim/frame-split-60fps.wsim
 create mode 100644 benchmarks/wsim/high-composited-game.wsim
 create mode 100644 benchmarks/wsim/media-1080p-player.wsim
 create mode 100644 benchmarks/wsim/medium-composited-game.wsim