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[v6,0/2] Refactor Gen11+ SAGV support

Message ID 20191022171857.19327-1-stanislav.lisovskiy@intel.com (mailing list archive)
Headers show
Series Refactor Gen11+ SAGV support | expand

Message

Stanislav Lisovskiy Oct. 22, 2019, 5:18 p.m. UTC
For Gen11+ platforms BSpec suggests disabling specific
QGV points separately, depending on bandwidth limitations
and current display configuration. Thus it required adding
a new PCode request for disabling QGV points and some
refactoring of already existing SAGV code.

Stanislav Lisovskiy (2):
  drm/i915: Refactor intel_can_enable_sagv
  drm/i915: Restrict qgv points which don't have enough bandwidth.

 drivers/gpu/drm/i915/display/intel_atomic.c   |  16 ++
 drivers/gpu/drm/i915/display/intel_atomic.h   |   3 +
 drivers/gpu/drm/i915/display/intel_bw.c       | 105 ++++++--
 drivers/gpu/drm/i915/display/intel_bw.h       |   2 +
 drivers/gpu/drm/i915/display/intel_display.c  |  58 ++++-
 .../drm/i915/display/intel_display_types.h    |  11 +
 drivers/gpu/drm/i915/i915_drv.h               |   2 +
 drivers/gpu/drm/i915/i915_reg.h               |   3 +
 drivers/gpu/drm/i915/intel_pm.c               | 229 +++++++++++++++++-
 9 files changed, 395 insertions(+), 34 deletions(-)