mbox series

[RFC,0/6] 3 display pipes combination system support

Message ID 20200123132659.725-1-anshuman.gupta@intel.com
Headers show
Series 3 display pipes combination system support | expand

Message

Anshuman Gupta Jan. 23, 2020, 1:26 p.m. UTC
This is a proposed RFC solution for 3 display pipes combination
system support.

Anshuman Gupta (6):
  drm/i915: Iterate over pipe and skip the disabled one
  drm/i915: Remove (pipe == crtc->index) asummption
  drm/i915: Fix wrongly populated plane possible_crtcs bit mask
  drm/i915: Get right max plane stride
  drm/i915: Add WARN_ON in intel_get_crtc_for_pipe()
  drm/i915: Enable 3 display pipes support

 drivers/gpu/drm/i915/display/intel_display.c  | 40 +++++++++++++++----
 drivers/gpu/drm/i915/display/intel_display.h  |  5 ++-
 .../drm/i915/display/intel_display_types.h    |  2 +
 drivers/gpu/drm/i915/i915_irq.c               |  6 ++-
 drivers/gpu/drm/i915/intel_device_info.c      |  7 ++--
 5 files changed, 45 insertions(+), 15 deletions(-)