[00/18] Preliminary Display13 support

Message

Matt Roper Jan. 28, 2021, 7:23 p.m. UTC

Upcoming platforms will be using a "Display13" design.  Despite the
version number bump, Display13 is a pretty natural evolution from
Display12 (which we've been using on TGL, RKL, DG1, and ADL-S).

This series provides the basic Display13 support that isn't tied to
a specific platform; any platforms incorporating the Display13 IP will
have additional platform-specific display patches as well.

Note that there are a few general Display13 changes that aren't included
in this series and will be sent separately:
 * Tiled surfaces need to be mapped into the GGTT in a special way
   (using "Display Page Tables").
 * Color management is programmed differently on Display13 (using a
   logarithmic scheme).  Since this relates to some new DRM property
   uapi, we'll just leave color management mostly disabled in this
   series and enable the new logarithmic color management later.

The changes for Display13 have some minor contextual conflicts with the
ADL-S series that Aditya currently has in flight.  Since the ADL-S
patches will be landing any time now, I've based the patches here on top
of the in-flight ADL-S patches.

Juha-Pekka Heikkilä (1):
  drm/i915/display13: Support 128k plane stride

Matt Roper (10):
  drm/i915/display13: add Display13 characteristics
  drm/i915/display13: Handle proper AUX interrupt bits
  drm/i915/display13: Enhanced pipe underrun reporting
  drm/i915/display13: Define plane capabilities
  drm/i915/display13: Only enable legacy gamma for now
  drm/i915/display13: Add Display13 power wells
  drm/i915/display13: Handle new location of outputs D and E
  drm/i915/display13: Increase maximum watermark lines to 255
  drm/i915/display13: Required bandwidth increases when VT-d is active
  drm/i915/display13: Add Wa_14011503030:d13

Nischal Varide (1):
  drm/i915/display13: Enabling dithering after the CC1 pipe

Uma Shankar (1):
  drm/i915/display13: Handle LPSP for Display 13

Vandita Kulkarni (5):
  drm/i915/display/dsc: Refactor intel_dp_dsc_compute_bpp
  drm/i915/display13: Support DP1.4 compression BPPs
  drm/i915/display13: Get slice height before computing rc params
  drm/i915/display13: Calculate VDSC RC parameters
  drm/i915/display13: Add rc_qp_table for rcparams calculation

 drivers/gpu/drm/i915/display/intel_bios.c     |   8 +-
 drivers/gpu/drm/i915/display/intel_bw.c       |   3 +
 drivers/gpu/drm/i915/display/intel_color.c    |  16 +
 drivers/gpu/drm/i915/display/intel_ddi.c      |   8 +-
 drivers/gpu/drm/i915/display/intel_display.c  |  21 +-
 drivers/gpu/drm/i915/display/intel_display.h  |   8 +
 .../drm/i915/display/intel_display_debugfs.c  |   7 +
 .../drm/i915/display/intel_display_power.c    | 426 +++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_dp.c       |  60 ++-
 drivers/gpu/drm/i915/display/intel_dp_aux.c   |  14 +-
 .../drm/i915/display/intel_fifo_underrun.c    |  55 ++-
 .../gpu/drm/i915/display/intel_qp_tables.h    | 294 ++++++++++++
 drivers/gpu/drm/i915/display/intel_sprite.c   |  40 +-
 drivers/gpu/drm/i915/display/intel_vdsc.c     | 123 ++++-
 drivers/gpu/drm/i915/i915_drv.h               |   1 +
 drivers/gpu/drm/i915/i915_irq.c               |  28 +-
 drivers/gpu/drm/i915/i915_pci.c               |  22 +
 drivers/gpu/drm/i915/i915_reg.h               |  29 +-
 drivers/gpu/drm/i915/intel_device_info.c      |   2 +-
 drivers/gpu/drm/i915/intel_device_info.h      |   2 +
 drivers/gpu/drm/i915/intel_pm.c               |  15 +-
 21 files changed, 1116 insertions(+), 66 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_qp_tables.h