mbox series

[0/2] drm/i915/xelpd: Enabling dithering after the CC1

Message ID 20210526181728.14817-1-bhanuprakash.modem@intel.com (mailing list archive)
Headers show
Series drm/i915/xelpd: Enabling dithering after the CC1 | expand

Message

Modem, Bhanuprakash May 26, 2021, 6:17 p.m. UTC
If the panel is 12bpc then Dithering is not enabled in the Legacy
dithering block , instead its Enabled after the C1 CC1 pipe post
color space conversion.For a 6bpc pannel Dithering is enabled in
Legacy block.

Bhanuprakash Modem (1):
  drm/i915/display/debug: Expose Dither status via debugfs

Nischal Varide (1):
  drm/i915/xelpd: Enabling dithering after the CC1

 drivers/gpu/drm/i915/display/intel_color.c    | 15 +++++++++
 drivers/gpu/drm/i915/display/intel_display.c  |  7 +++-
 .../drm/i915/display/intel_display_debugfs.c  | 32 +++++++++++++++++++
 drivers/gpu/drm/i915/i915_reg.h               |  3 +-
 4 files changed, 55 insertions(+), 2 deletions(-)

--
2.20.1