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[0/5] Pipe DMC bits + PSR fix

Message ID 20210617211225.13549-1-anusha.srivatsa@intel.com (mailing list archive)
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Series Pipe DMC bits + PSR fix | expand

Message

Srivatsa, Anusha June 17, 2021, 9:12 p.m. UTC
Pipe DMC series exposed a corner case in PSR patches
that were merged recently. Sending the fix along with
the Pipe DMC bits to get ensure that CI has no
regressions.

Anusha Srivatsa (4):
  drm/i915/dmc: Introduce DMC_FW_MAIN
  drm/i915/xelpd: Pipe A DMC plugging
  drm/i915/adl_p: Pipe B DMC Support
  drm/i915/adl_p: Load DMC

Gwan-gyeong Mun (1):
  drm/i915/display: Limit disabling PSR around cdclk changes to ADL-P

 drivers/gpu/drm/i915/display/intel_cdclk.c    |  22 ++-
 .../drm/i915/display/intel_display_debugfs.c  |   6 +-
 .../drm/i915/display/intel_display_power.c    |   5 +-
 drivers/gpu/drm/i915/display/intel_dmc.c      | 165 ++++++++++--------
 drivers/gpu/drm/i915/display/intel_dmc.h      |  23 ++-
 drivers/gpu/drm/i915/i915_reg.h               |   2 +-
 6 files changed, 139 insertions(+), 84 deletions(-)