From patchwork Wed Jun 23 06:28:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Thomas_Hellstr=C3=B6m?= X-Patchwork-Id: 12339071 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2D26C4743C for ; Wed, 23 Jun 2021 06:28:46 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1758A6120D for ; Wed, 23 Jun 2021 06:28:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1758A6120D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A48C489A62; Wed, 23 Jun 2021 06:28:44 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9FA8A89A62; Wed, 23 Jun 2021 06:28:43 +0000 (UTC) IronPort-SDR: I9f7pmS2fOhLVIovNMkZbf7cJTTqFD8I3jevukwUrJ85RSsIKh/Ng93XxbtIrhRelQD4TNncGn +XfH56AO0ZhQ== X-IronPort-AV: E=McAfee;i="6200,9189,10023"; a="268342177" X-IronPort-AV: E=Sophos;i="5.83,293,1616482800"; d="scan'208";a="268342177" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2021 23:28:42 -0700 IronPort-SDR: e+qNcmw4KdhOItgDcU+EY11XysQAxQsbthmVLfP1dg2S6WPoCq+eNbp5E3/Ne4ZcSqdCYTWZDu HqKuUbcgxBgA== X-IronPort-AV: E=Sophos;i="5.83,293,1616482800"; d="scan'208";a="639346847" Received: from ibanaga-mobl.ger.corp.intel.com (HELO thellst-mobl1.intel.com) ([10.249.254.100]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2021 23:28:40 -0700 From: =?utf-8?q?Thomas_Hellstr=C3=B6m?= To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Wed, 23 Jun 2021 08:28:22 +0200 Message-Id: <20210623062825.417187-1-thomas.hellstrom@linux.intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v8 0/3] drm/i915: Move system memory to TTM for discrete X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Thomas_Hellstr=C3=B6m?= , matthew.auld@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Early implementation of moving system memory for discrete cards over to TTM. We first add the notion of objects being migratable under the object lock to i915 gem, and add some asserts to verify that objects are either locked or pinned when the placement is checked by the gem code. Patch 2 deals with updating the i915 gem bookkeeping after a TTM move, Patch 3 moves system over from shmem to TTM for discrete Note that the mock device doesn't consider itself discrete so the TTM system path is not checked by the mock selftests. v2: - Style fixes (reported by Matthew Auld) - Drop the last patch (migration) It needs selftests and some additional work. - Unconditionally add VM_IO at mmap time. v3: - More style fixes (reported by Matthew Auld) - Don't overfill the busy placement vector (reported by Matthew Auld) v4: - Remove confusion around shrinkable objects (reported by Matthew Auld) v5: - Remove confusion around shrinkable objects again, but this time in the correct patch. (reported by Matthew Auld) v6: - One patch already committed. - Introduce a __i915_gem_object_is_lmem() to be used in situations where we know that a fence that can't currently signal keeps the object from being migrated or evicted. - Rebase on accelerated TTM moves - Fix TODO:s for supporting system memory with TTM. - Update the object GEM region after a TTM move if compatible. - Move a couple of warnings for shmem on DGFX. v7: - Just updated a commit message with version history under dashes. v8: - Reinstate alignment at ttm_bo_init_reserved() time. (Reported by Matthew Auld). - When changing regions, also move the object to the new region list and break early. (Reported by Matthew Auld). - Don't flag the object as contiguous based on the current region min pages size. Thomas Hellström (3): drm/i915: Update object placement flags to be mutable drm/i915/ttm: Adjust gem flags and caching settings after a move drm/i915/ttm: Use TTM for system memory drivers/gpu/drm/i915/gem/i915_gem_internal.c | 4 +- drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 22 ++ drivers/gpu/drm/i915/gem/i915_gem_lmem.h | 2 + drivers/gpu/drm/i915/gem/i915_gem_mman.c | 12 +- drivers/gpu/drm/i915/gem/i915_gem_object.c | 38 ++++ drivers/gpu/drm/i915/gem/i915_gem_object.h | 14 +- .../gpu/drm/i915/gem/i915_gem_object_types.h | 20 +- drivers/gpu/drm/i915/gem/i915_gem_pages.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_phys.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_region.c | 4 - drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 10 +- drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 196 ++++++++++++++---- drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 4 +- .../drm/i915/gem/selftests/huge_gem_object.c | 4 +- .../gpu/drm/i915/gem/selftests/huge_pages.c | 5 +- .../drm/i915/gem/selftests/i915_gem_mman.c | 4 +- .../drm/i915/gem/selftests/i915_gem_phys.c | 3 +- drivers/gpu/drm/i915/i915_drv.h | 3 - drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- drivers/gpu/drm/i915/intel_memory_region.c | 7 +- drivers/gpu/drm/i915/intel_memory_region.h | 8 + 21 files changed, 267 insertions(+), 99 deletions(-)