mbox series

[v7,0/3] Enable setting custom DSC BPP

Message ID 20210720064907.9771-1-vandita.kulkarni@intel.com (mailing list archive)
Headers show
Series Enable setting custom DSC BPP | expand

Message

Kulkarni, Vandita July 20, 2021, 6:49 a.m. UTC
This series add debugfs entry to force dsc bpp to
ceratin valid test value, for validation needs.
This series has been tested locally.
With the introduction of i915_dsc_bpp debugfs
the expectation is that whenever there is force_dsc_en
set, force_dsc_bpp should have a valid value for that
format which is between bpp to bpp-1.

This makes the older test kms_dp_dsc --basic fail
as in that case force_dsc_bpp would be 0 and is not a valid
value.

Have tested with local changes on the same.
The series https://patchwork.freedesktop.org/series/91772/
have the base patches and would need some work on the debugfs name
change, giving default value for force_dsc_bpp in case of
basic-dsc-enable
test cases, clearing up of the force_dsc_bpp value while exiting the
test. Which will be floated shortly.

Have added minor fix on the feci debugfs interface.
If further changes are needed on the same will float them in a different
series.

This series has been reviewed here
https://patchwork.freedesktop.org/series/92312/#rev5

Resubmitting it here as the series submitter got overridden due to
one of the review comment mishaps.

Patnana Venkata Sai (1):
  drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP
    enable

Vandita Kulkarni (2):
  drm/i915/display: Add write permissions for fec support
  drm/i915/display/dsc: Force dsc BPP

 .../drm/i915/display/intel_display_debugfs.c  | 78 ++++++++++++++++++-
 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_dp.c       | 17 ++++
 3 files changed, 94 insertions(+), 2 deletions(-)

Comments

Kulkarni, Vandita July 20, 2021, 7:53 a.m. UTC | #1
Pushed to drm-intel-next, thanks for the reviews.
-Vandita

> -----Original Message-----
> From: Kulkarni, Vandita <vandita.kulkarni@intel.com>
> Sent: Tuesday, July 20, 2021 12:19 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Kulkarni, Vandita <vandita.kulkarni@intel.com>
> Subject: [v7 0/3] Enable setting custom DSC BPP
> 
> This series add debugfs entry to force dsc bpp to ceratin valid test value, for
> validation needs.
> This series has been tested locally.
> With the introduction of i915_dsc_bpp debugfs the expectation is that
> whenever there is force_dsc_en set, force_dsc_bpp should have a valid
> value for that format which is between bpp to bpp-1.
> 
> This makes the older test kms_dp_dsc --basic fail as in that case
> force_dsc_bpp would be 0 and is not a valid value.
> 
> Have tested with local changes on the same.
> The series https://patchwork.freedesktop.org/series/91772/
> have the base patches and would need some work on the debugfs name
> change, giving default value for force_dsc_bpp in case of basic-dsc-enable
> test cases, clearing up of the force_dsc_bpp value while exiting the test.
> Which will be floated shortly.
> 
> Have added minor fix on the feci debugfs interface.
> If further changes are needed on the same will float them in a different
> series.
> 
> This series has been reviewed here
> https://patchwork.freedesktop.org/series/92312/#rev5
> 
> Resubmitting it here as the series submitter got overridden due to one of the
> review comment mishaps.
> 
> Patnana Venkata Sai (1):
>   drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP
>     enable
> 
> Vandita Kulkarni (2):
>   drm/i915/display: Add write permissions for fec support
>   drm/i915/display/dsc: Force dsc BPP
> 
>  .../drm/i915/display/intel_display_debugfs.c  | 78 ++++++++++++++++++-
>  .../drm/i915/display/intel_display_types.h    |  1 +
>  drivers/gpu/drm/i915/display/intel_dp.c       | 17 ++++
>  3 files changed, 94 insertions(+), 2 deletions(-)
> 
> --
> 2.32.0