From patchwork Fri Jan 21 04:31:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew Brost X-Patchwork-Id: 12719249 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1F8E3C433EF for ; Fri, 21 Jan 2022 04:37:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1F57810E532; Fri, 21 Jan 2022 04:37:11 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9A24B10E476; Fri, 21 Jan 2022 04:37:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642739828; x=1674275828; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=sz6SzmBXAt2m5mxFQ5dQsMziRyMDYdVVHXe/b7y+lds=; b=ek3npj5nIQSd39ZUqJZuVcmfuldjStzRXweLyI+9Fv+FbEe0ssA4b1Rl t0euIEXcLLGNOqBk3vI29uYYdFMuLEVFj9fALPFeCZMlR8q39RXxecjEk 38e5I3Sq4BO0lb9QSbtLrR4KZTDampTIm7kMYF+4CwzqcUTU8vwGMqwC2 qNJuZjtjSubR3+6Ho+sS8A9eOZkbTNUwg5ktqZKFtZ3GoWWwiLV1qGY0e chNcWkNIK/Z4tHkCaqHew1sR1hNAzenoYA7Io/VI1e8yxGwpzB6019Oyd sCmn9gRGhwH6v17KKDBHt1oJE8Yrg65nYOVfrwAxMRKy5AfUZrXtAgnmJ Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10233"; a="244384009" X-IronPort-AV: E=Sophos;i="5.88,304,1635231600"; d="scan'208";a="244384009" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jan 2022 20:37:08 -0800 X-IronPort-AV: E=Sophos;i="5.88,304,1635231600"; d="scan'208";a="626596547" Received: from jons-linux-dev-box.fm.intel.com ([10.1.27.20]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jan 2022 20:37:07 -0800 From: Matthew Brost To: , Date: Thu, 20 Jan 2022 20:31:15 -0800 Message-Id: <20220121043118.24886-1-matthew.brost@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 0/3] Flush G2H handler during a GT reset X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" After a small fix to error capture code, we now can flush G2H during a GT reset which simplifies code and seals some extreme corner case races. v2: (CI) - Don't trigger GT reset from G2H handler v3: - Address John Harrison's comments v4: - Address John Harrison's comments Signed-off-by: Matthew Brost Matthew Brost (3): drm/i915: Allocate intel_engine_coredump_alloc with ALLOW_FAIL drm/i915/guc: Add work queue to trigger a GT reset drm/i915/guc: Flush G2H handler during a GT reset drivers/gpu/drm/i915/gt/uc/intel_guc.h | 9 +++ .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 55 ++++++++++++------- drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- 3 files changed, 44 insertions(+), 22 deletions(-)