From patchwork Thu Feb 3 20:03:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Cheng X-Patchwork-Id: 12734601 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 02B23C433EF for ; Thu, 3 Feb 2022 20:04:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BFDF210E287; Thu, 3 Feb 2022 20:04:11 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4824C10E185; Thu, 3 Feb 2022 20:04:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1643918649; x=1675454649; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=yWCBb5BDnUZ8M1t5Kc98dfQQt6hh5FJM+UtM7zgggyo=; b=YgArp5FQYOjVaC8G/lU+3D1vsaqmdO5G79dIDwQcWK5+Cnd5sLE0BGSg 2AYLgDIsRhjPbtcP7m9KrmGsjqXIkILW45OLYJJ1koLdvVMY9wLuDpN5y 3L75/ViAcU7O1ye9kpUeTA3CLs2cvd7NsOSXqCxwgQCm8hudS6UN5J1tB fFVch9jEo/rjpv0WwiarqO3Q6/YdLY9f9YydWzG50kMsTtVKzIylktq38 R63ygSXivULwTGT6OH2SKghIX7EHyWvdB9q89mOrCvdACtaaPkd64Kjg/ oaH/DNvwRGlsVeTuIVkJCJaQxNpiEwTEd7A+81X4dnNj2H3iA5aAef/JS w==; X-IronPort-AV: E=McAfee;i="6200,9189,10247"; a="311545990" X-IronPort-AV: E=Sophos;i="5.88,340,1635231600"; d="scan'208";a="311545990" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2022 12:04:08 -0800 X-IronPort-AV: E=Sophos;i="5.88,340,1635231600"; d="scan'208";a="538894379" Received: from gearygra-mobl2.amr.corp.intel.com (HELO mvcheng-desk2.lan) ([10.212.225.194]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2022 12:04:08 -0800 From: Michael Cheng To: intel-gfx@lists.freedesktop.org Date: Thu, 3 Feb 2022 12:03:59 -0800 Message-Id: <20220203200403.378958-1-michael.cheng@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v4 0/4] Use drm_clflush* instead of clflush X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: michael.cheng@intel.com, lucas.demarchi@intel.com, dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" This patch series re-work a few i915 functions to use drm_clflush_virt_range instead of calling clflush or clflushopt directly. This will prevent errors when building for non-x86 architectures. v2: s/PAGE_SIZE/sizeof(value) for Re-work intel_write_status_page and added more patches to convert additional clflush/clflushopt to use drm_clflush*. (Michael Cheng) v3: Drop invalidate_csb_entries and directly invoke drm_clflush_virt_ran v4: Remove extra memory barriers Michael Cheng (4): drm/i915/gt: Re-work intel_write_status_page drm/i915/gt: Drop invalidate_csb_entries drm/i915/gt: Re-work reset_csb drm/i915/: Re-work clflush_write32 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 8 +++----- drivers/gpu/drm/i915/gt/intel_engine.h | 13 ++++--------- .../drm/i915/gt/intel_execlists_submission.c | 17 +++++------------ 3 files changed, 12 insertions(+), 26 deletions(-)