From patchwork Tue Feb 15 05:51:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 12746525 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EDD3DC433EF for ; Tue, 15 Feb 2022 05:51:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3228F10E1E2; Tue, 15 Feb 2022 05:51:44 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0D31410E193; Tue, 15 Feb 2022 05:51:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644904303; x=1676440303; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=8QHoZNm/E9WjXmpjpR/lOxRLGzparTARU1gUTq5Ht7I=; b=jX5DZ/WXBatLY68FQ8JY3b3Jt42NJvB4LoK875/F37+uPJTQVM2mvTMF VvFKOw2INSzAXv9nJUWYHk9rRiMT3oTZnE9iyo9rbo4R1g20BbKj2HB7I gCtnB8SiViKuGUrTbUbwEPOo6TzTrYR/PyP9eMDlB6OUvEE1r6gjuNau3 mHfmriuPfWshMCkmItsLeWp3ALos7o83ojLVqqtgmDaLYOWb3P9zH56aG VHmYltnJi6Px8Wa2m3KpInj8lM/3OCcU/GMOiizwD5OspF4Wr6kMFmLK1 T5gLGG13QZmn2gtjQyySMcPnjGq+H/zEfQB7tzd7c68LymHxE2R9BE/jY w==; X-IronPort-AV: E=McAfee;i="6200,9189,10258"; a="233802212" X-IronPort-AV: E=Sophos;i="5.88,370,1635231600"; d="scan'208";a="233802212" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2022 21:51:42 -0800 X-IronPort-AV: E=Sophos;i="5.88,370,1635231600"; d="scan'208";a="544109262" Received: from ramaling-i9x.iind.intel.com ([10.203.144.108]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2022 21:51:40 -0800 From: Ramalingam C To: intel-gfx , dri-devel Date: Tue, 15 Feb 2022 11:21:51 +0530 Message-Id: <20220215055154.15363-1-ramalingam.c@intel.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 0/3] drm/i915/dg2: 5th Display output X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Fixing the 5th Display output for DG2. Jouni Högander (1): drm/i915: Fix for PHY_MISC_TC1 offset Matt Roper (2): drm/i915/dg2: Enable 5th display drm/i915/dg2: Drop 38.4 MHz MPLLB tables drivers/gpu/drm/i915/display/intel_gmbus.c | 16 +- drivers/gpu/drm/i915/display/intel_snps_phy.c | 210 +----------------- drivers/gpu/drm/i915/i915_irq.c | 5 +- drivers/gpu/drm/i915/i915_reg.h | 7 +- 4 files changed, 25 insertions(+), 213 deletions(-)