From patchwork Tue May 3 19:13:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bob Beckett X-Patchwork-Id: 12836088 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A8CCEC433EF for ; Tue, 3 May 2022 19:13:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D8FC810E7C2; Tue, 3 May 2022 19:13:43 +0000 (UTC) Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by gabe.freedesktop.org (Postfix) with ESMTPS id 30B7610E187; Tue, 3 May 2022 19:13:42 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: bbeckett) with ESMTPSA id 7F46E1F445A0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651605220; bh=+gBdRtvLQdGVcoXaWTnmpgxw7h/r83P/zCjCku+IvYo=; h=From:To:Cc:Subject:Date:From; b=GGwEI3IbfciDKGZJND124UDmL5bV3M7qC+LhAk+StGU8OFzQfeeJ26FqyianGj+P1 zTtD5h9xLQJvojy2Q7/M5RtbbPE+omyqielXEDH+5cCDePeWLNjiYUbe+xB/V0hhFf OmLQLE9ZsNt+raKQqZWaNKmD7DWYUAj9QmFj+YLlKl+Ylv1ye7Dnjtgn6NFJcGVthI hafdi+ygvEIaJ9DMNB0oEnPQyxy9HU1YwYV1dSb5eZm7LOfjoWK4IXDmy1dBo5dezi MLoBlgsaiSvAE4y50kbOhyNSNb7+IKpFFzbqefDBltNrrl2WuYbU9VJusUeiWXBHyP Gv3zQtcAIK8TQ== From: Robert Beckett To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Date: Tue, 3 May 2022 19:13:12 +0000 Message-Id: <20220503191316.1145124-1-bob.beckett@collabora.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 0/4] ttm for internal X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Thomas_Hellstr=C3=B6m?= , Matthew Auld Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" This series refactors i915's internal buffer backend to use ttm. It uses ttm's pool allocator to allocate volatile pages in place of the old code which rolled its own via alloc_pages. This is continuing progress to align all backends on using ttm. Robert Beckett (4): drm/i915: add gen6 ppgtt dummy creation function drm/i915: setup ggtt scratch page after memory regions drm/i915: allow volatile buffers to use ttm pool allocator drm/i915: internal buffers use ttm backend drivers/gpu/drm/i915/gem/i915_gem_internal.c | 264 ++++++++----------- drivers/gpu/drm/i915/gem/i915_gem_internal.h | 5 - drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 15 +- drivers/gpu/drm/i915/gem/i915_gem_ttm.h | 12 +- drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 43 ++- drivers/gpu/drm/i915/gt/intel_gt_gmch.c | 20 +- drivers/gpu/drm/i915/gt/intel_gt_gmch.h | 6 + drivers/gpu/drm/i915/i915_driver.c | 16 +- 8 files changed, 201 insertions(+), 180 deletions(-)