[v5,0/5] Initial Meteorlake Support

Message

Radhakrishna Sripada Sept. 13, 2022, 6:33 p.m. UTC

The PCI Id's and platform definition are posted earlier.
This series adds handful of early enablement patches including
support for display power wells, VBT and AUX Channel mapping,
PCH and gmbus support, dbus, mbus, sagv and memory bandwidth support.

This series also add the support for a new way to read Graphics,
Media and Display versions

This is based out of the earlier series posted at [1]. Several
of the patches from the earlier series got merged. This version is
rebased on top of the earlier patches that got merged.

[1] https://patchwork.freedesktop.org/series/106786/


José Roberto de Souza (1):
  drm/i915: Parse and set stepping for platforms with GMD

Madhumitha Tolakanahalli Pradeep (1):
  drm/i915/mtl: Update CHICKEN_TRANS* register addresses

Matt Roper (2):
  drm/i915: Read graphics/media/display arch version from hw
  drm/i915/mtl: Define engine context layouts

Radhakrishna Sripada (1):
  drm/i915/mtl: Update MBUS_DBOX credits

 drivers/gpu/drm/i915/display/intel_display.c | 14 +++-
 drivers/gpu/drm/i915/display/intel_dp_mst.c  |  5 +-
 drivers/gpu/drm/i915/display/skl_watermark.c | 48 ++++++++++--
 drivers/gpu/drm/i915/gt/intel_gt_regs.h      |  2 +
 drivers/gpu/drm/i915/gt/intel_lrc.c          | 82 +++++++++++++++++++-
 drivers/gpu/drm/i915/i915_driver.c           |  3 +-
 drivers/gpu/drm/i915/i915_drv.h              |  2 +
 drivers/gpu/drm/i915/i915_pci.c              |  1 +
 drivers/gpu/drm/i915/i915_reg.h              | 18 +++++
 drivers/gpu/drm/i915/intel_device_info.c     | 74 +++++++++++++++++-
 drivers/gpu/drm/i915/intel_device_info.h     | 12 ++-
 drivers/gpu/drm/i915/intel_step.c            | 60 ++++++++++++++
 12 files changed, 306 insertions(+), 15 deletions(-)