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[0/4] drm/i915: Start cleaning up the DPLL ID mess

Message ID 20220921122343.13061-1-ville.syrjala@linux.intel.com (mailing list archive)
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Series drm/i915: Start cleaning up the DPLL ID mess | expand

Message

Ville Syrjala Sept. 21, 2022, 12:23 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Start to clean up the mess around DPLL IDs a bit by removing
the nasty assumption that the index of the DPLL in the
arrays matches its ID. Fortunately we did have a WARN
i nthere to cathc mistakes, but better to not has such
silly assumptions i nthe first place.

There's still a lot of mess left since the DPLL IDs in
the hardware are a mess as well. Eg. the index of the
register instance often differs from the index used
to select the DPLL in clock routing thing. So we could
probably clean up more of that, perhaps by declaring
separate IDs for each PLL for each use case...

Ville Syrjälä (4):
  drm/i915: Always initialize dpll.lock
  drm/i915: Nuke intel_get_shared_dpll_id()
  drm/i915: Stop requiring PLL index == PLL ID
  drm/i915: Decouple I915_NUM_PLLS from PLL IDs

 drivers/gpu/drm/i915/display/intel_ddi.c      |   4 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 105 +++++++++++-------
 drivers/gpu/drm/i915/display/intel_dpll_mgr.h |   3 -
 .../gpu/drm/i915/display/intel_pch_refclk.c   |   5 +-
 4 files changed, 69 insertions(+), 48 deletions(-)