| Message ID | 20221005191838.466351-1-alan.previn.teres.alexis@intel.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | drm/i915/pxp: Prepare intel_pxp entry points for MTL | expand |
I just realize i missed a patch (similar refactoring for pxp-suspend/resume when caller is external). Will post a rev2 with that missing bit. Review can continue on rev1 though (rev2 will be an additional patch following the same design proposal). ...alan On Wed, 2022-10-05 at 12:18 -0700, Alan Previn wrote: > MTL has two tiles that is represented by the intel_gt structure in the i915 > code. The PXP feature has a control-structure that contains the PXP context > and this hangs of the intel_gt structure. In MTL, the standalone media tile > (i.e. not the root tile) contains the VDBOX and KCR engine which is what > PXP relies on for establishing and tearing down the PXP session. However > PXP is a global feature as other engines on other tiles can reference the > PXP session in object info within batch buffer instructions.That coherrency > is handled implicitly by the HW. However current intel_pxp functions such > as intel_pxp_enabled, intel_pxp_start and others take in the intel_gt > structure pointer as its input thus creation the perception that PXP is > a GT-tile specific domain that is independant from other GT tiles. > > This series updates all of the intel_pxp_foo functions that are accessed > from outside the PXP subsystem so that the callers only need to pass in the > i915 structure as the input param (being a global handle). Internally, > these functions will loop through all available GT structures on the GPU > and find the one GT structure that contains the one PXP+TEE control > structure before proceeding with the rest of its operation. > > Alan Previn (6): > drm/i915/pxp: Make gt and pxp init/fini aware of PXP-owning-GT > drm/i915/pxp: Make intel_pxp_is_enabled implicitly sort PXP-owning-GT > drm/i915/pxp: Make intel_pxp_is_active implicitly sort PXP-owning-GT > drm/i915/pxp: Make PXP tee component bind/unbind aware of > PXP-owning-GT > drm/i915/pxp: Make intel_pxp_start implicitly sort PXP-owning-GT > drm/i915/pxp: Make intel_pxp_key_check implicitly sort PXP-owning-GT > > .../drm/i915/display/skl_universal_plane.c | 2 +- > drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 +- > drivers/gpu/drm/i915/gem/i915_gem_create.c | 2 +- > .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 +- > drivers/gpu/drm/i915/gt/intel_gt.c | 4 + > drivers/gpu/drm/i915/gt/intel_gt_types.h | 5 ++ > drivers/gpu/drm/i915/gt/intel_sa_media.c | 4 + > drivers/gpu/drm/i915/i915_drv.h | 6 +- > drivers/gpu/drm/i915/i915_pci.c | 1 + > drivers/gpu/drm/i915/intel_device_info.h | 1 + > drivers/gpu/drm/i915/pxp/intel_pxp.c | 79 ++++++++++++++++--- > drivers/gpu/drm/i915/pxp/intel_pxp.h | 10 ++- > drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c | 2 +- > drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c | 8 +- > drivers/gpu/drm/i915/pxp/intel_pxp_irq.c | 7 +- > drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 8 +- > drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 21 ++++- > 17 files changed, 130 insertions(+), 38 deletions(-) > > > base-commit: eeba73dc310025dbbf2edf81098cd114cbcec54b > -- > 2.34.1 >
MTL has two tiles that is represented by the intel_gt structure in the i915 code. The PXP feature has a control-structure that contains the PXP context and this hangs of the intel_gt structure. In MTL, the standalone media tile (i.e. not the root tile) contains the VDBOX and KCR engine which is what PXP relies on for establishing and tearing down the PXP session. However PXP is a global feature as other engines on other tiles can reference the PXP session in object info within batch buffer instructions.That coherrency is handled implicitly by the HW. However current intel_pxp functions such as intel_pxp_enabled, intel_pxp_start and others take in the intel_gt structure pointer as its input thus creation the perception that PXP is a GT-tile specific domain that is independant from other GT tiles. This series updates all of the intel_pxp_foo functions that are accessed from outside the PXP subsystem so that the callers only need to pass in the i915 structure as the input param (being a global handle). Internally, these functions will loop through all available GT structures on the GPU and find the one GT structure that contains the one PXP+TEE control structure before proceeding with the rest of its operation. Alan Previn (6): drm/i915/pxp: Make gt and pxp init/fini aware of PXP-owning-GT drm/i915/pxp: Make intel_pxp_is_enabled implicitly sort PXP-owning-GT drm/i915/pxp: Make intel_pxp_is_active implicitly sort PXP-owning-GT drm/i915/pxp: Make PXP tee component bind/unbind aware of PXP-owning-GT drm/i915/pxp: Make intel_pxp_start implicitly sort PXP-owning-GT drm/i915/pxp: Make intel_pxp_key_check implicitly sort PXP-owning-GT .../drm/i915/display/skl_universal_plane.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 +- drivers/gpu/drm/i915/gem/i915_gem_create.c | 2 +- .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 +- drivers/gpu/drm/i915/gt/intel_gt.c | 4 + drivers/gpu/drm/i915/gt/intel_gt_types.h | 5 ++ drivers/gpu/drm/i915/gt/intel_sa_media.c | 4 + drivers/gpu/drm/i915/i915_drv.h | 6 +- drivers/gpu/drm/i915/i915_pci.c | 1 + drivers/gpu/drm/i915/intel_device_info.h | 1 + drivers/gpu/drm/i915/pxp/intel_pxp.c | 79 ++++++++++++++++--- drivers/gpu/drm/i915/pxp/intel_pxp.h | 10 ++- drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c | 2 +- drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c | 8 +- drivers/gpu/drm/i915/pxp/intel_pxp_irq.c | 7 +- drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 8 +- drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 21 ++++- 17 files changed, 130 insertions(+), 38 deletions(-) base-commit: eeba73dc310025dbbf2edf81098cd114cbcec54b