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[0/4] i915: CAGF and RC6 changes for MTL

Message ID 20221019052043.3193842-1-ashutosh.dixit@intel.com (mailing list archive)
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Series i915: CAGF and RC6 changes for MTL | expand

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Dixit, Ashutosh Oct. 19, 2022, 5:20 a.m. UTC
This series includes the code changes to get CAGF, RC State and C6
Residency of MTL.

v3: Included "Use GEN12 RPSTAT register" patch

v4:
  - Rebased
  - Dropped "Use GEN12 RPSTAT register" patch from this series
    going to send separate series for it

v5:
- Included "drm/i915/gt: Change RC6 residency functions to accept register
  ID's" based on code review feedback

v6:
- Addressed Jani N's review comments on "drm/i915/gt: Change RC6 residency
  functions to accept register ID's"
- Minor changes to other patches, please see individual patches for changelogs

Ashutosh Dixit (1):
  drm/i915/gt: Use RC6 residency types as arguments to residency
    functions

Badal Nilawar (2):
  drm/i915/mtl: Modify CAGF functions for MTL
  drm/i915/mtl: C6 residency and C state type for MTL SAMedia

Don Hiatt (1):
  drm/i915: Use GEN12_RPSTAT register for GT freq

 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 87 ++++++++++++++-----
 drivers/gpu/drm/i915/gt/intel_gt_regs.h       | 11 +++
 drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c   | 12 +--
 drivers/gpu/drm/i915/gt/intel_rc6.c           | 64 +++++++++-----
 drivers/gpu/drm/i915/gt/intel_rc6.h           |  8 +-
 drivers/gpu/drm/i915/gt/intel_rc6_types.h     | 15 +++-
 drivers/gpu/drm/i915/gt/intel_rps.c           | 40 ++++++++-
 drivers/gpu/drm/i915/gt/intel_rps.h           |  2 +
 drivers/gpu/drm/i915/gt/selftest_rc6.c        |  6 +-
 drivers/gpu/drm/i915/i915_pmu.c               |  9 +-
 10 files changed, 188 insertions(+), 66 deletions(-)