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[0/4] Panel replay phase1 implementation

Message ID 20221110150307.3366-1-animesh.manna@intel.com (mailing list archive)
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Series Panel replay phase1 implementation | expand

Message

Manna, Animesh Nov. 10, 2022, 3:03 p.m. UTC 
Panel Replay is a power saving feature for DP 2.0 monitor and similar
to PSR on EDP.

These patches are basic enablement patches added on top of
existing psr framework to enable full-screen live active frame
update mode of panel replay. Panel replay also can be enabled
in selective update mode which will be enabled in a incremental
approach.

Note: The patches are not tested due to unavailability of monitorPanel replay phase1 implementation

Cc: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>

Animesh Manna (4):
  drm/i915/panelreplay: dpcd register definition for panelreplay
  drm/i915/panelreplay: Added HAS_PANEL_REPLAY() macro
  drm/i915/panelreplay: Initializaton and compute config for panel
    replay
  drm/i915/panelreplay: enable/disable panel replay

 .../drm/i915/display/intel_display_types.h    | 15 ++++
 drivers/gpu/drm/i915/display/intel_dp.c       | 44 ++++++++---
 drivers/gpu/drm/i915/display/intel_psr.c      | 74 +++++++++++++++++--
 drivers/gpu/drm/i915/display/intel_psr.h      |  1 +
 drivers/gpu/drm/i915/i915_drv.h               |  1 +
 include/drm/display/drm_dp.h                  | 11 +++
 6 files changed, 131 insertions(+), 15 deletions(-)