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[v2,0/9] drm/i915/pxp: Add MTL PXP Support

Message ID 20230111214226.907536-1-alan.previn.teres.alexis@intel.com (mailing list archive)
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Series drm/i915/pxp: Add MTL PXP Support | expand

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Teres Alexis, Alan Previn Jan. 11, 2023, 9:42 p.m. UTC
This series enables PXP on MTL. On ADL/TGL platforms, we rely on
the mei driver via the i915-mei PXP component interface to establish
a connection to the security firmware via the HECI device interface.
That interface is used to create and teardown the PXP ARB session.
PXP ARB session is created when protected contexts are created.

In this series, the front end behaviors and interfaces (uapi) remain
the same. We add backend support for MTL but with MTL we directly use
the GSC-CS engine on the MTL GPU device to send messages to the PXP
(a.k.a. GSC a.k.a graphics-security) firmware. With MTL, the format
of the message is slightly different with a 2-layer packetization
that is explained in detail in Patch #4. Also, the second layer
which is the actual PXP firmware packet is now rev'd to version 4.3
for MTL that is defined in Patch #6.

Changes from prior revs:
   v1 : - fixed when building with CONFIG_PXP disabled.
        - more alignment with gsc_mtl_header structure from the HDCP

Alan Previn (9):
  drm/i915/pxp: Add MTL PXP GSC-CS back-end skeleton
  drm/i915/pxp: Add GSC-CS back-end resource init and cleanup
  drm/i915/pxp: Add MTL hw-plumbing enabling for KCR operation
  drm/i915/pxp: Add MTL helpers to submit Heci-Cmd-Packet to GSC
  drm/i915/pxp: Add GSC-CS backend to send GSC fw messages
  drm/i915/pxp: Add ARB session creation with new PXP API Ver4.3
  drm/i915/pxp: MTL-KCR interrupt ctrl's are in GT-0
  drm/i915/pxp: On MTL, KCR enabling doesn't wait on tee component
  drm/i915/pxp: Enable PXP with MTL-GSC-CS

 drivers/gpu/drm/i915/Makefile                 |   2 +
 drivers/gpu/drm/i915/gt/intel_gpu_commands.h  |   2 +
 drivers/gpu/drm/i915/gt/intel_gt_irq.c        |   3 +-
 .../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c | 107 +++++
 .../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h |  69 ++++
 drivers/gpu/drm/i915/i915_pci.c               |   1 +
 drivers/gpu/drm/i915/pxp/intel_pxp.c          |  92 ++++-
 drivers/gpu/drm/i915/pxp/intel_pxp.h          |   4 +-
 .../drm/i915/pxp/intel_pxp_cmd_interface_43.h |  27 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c  |   2 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c    | 380 ++++++++++++++++++
 drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h    |  30 ++
 drivers/gpu/drm/i915/pxp/intel_pxp_irq.c      |  23 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_irq.h      |   8 +
 drivers/gpu/drm/i915/pxp/intel_pxp_pm.c       |  10 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_regs.h     |  26 ++
 drivers/gpu/drm/i915/pxp/intel_pxp_session.c  |  37 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_tee.c      |  13 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_types.h    |  11 +
 19 files changed, 791 insertions(+), 56 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c
 create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h
 create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
 create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h
 create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_regs.h


base-commit: bf7f7c53ac622a3f6d6738d062e59dd21ce28bd7