| Message ID | 20230308-guard_error_capture-v6-0-1b5f31422563@intel.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | drm/i915: add guard page to ggtt->error_capture | expand |
On 10.03.2023 10:23, Andrzej Hajda wrote: > This patch tries to diminish plague of DMAR read errors present > in CI for ADL*, RPL*, DG2 platforms, see for example [1] (grep DMAR). > CI is usually tolerant for these errors, so the scale of the problem > is not really visible. > To show it I have counted lines containing DMAR read errors in dmesgs > produced by CI for all three versions of the patch, but in contrast to v2 > I have grepped only for lines containing "PTE Read access". > Below stats for kernel w/o patchset vs patched one. > v1: 210 vs 0 > v2: 201 vs 0 > v3: 214 vs 0 > Apparently the patchset fixes all common PTE read errors. > > Changelog: > v2: > - modified commit message (I hope the diagnosis is correct), > - added bug checks to ensure scratch is initialized on gen3 platforms. > CI produces strange stacktrace for it suggesting scratch[0] is NULL, > to be removed after resolving the issue with gen3 platforms. > v3: > - removed bug checks, replaced with gen check. > v4: > - change code for scratch page insertion to support all platforms, > - add info in commit message there could be more similar issues > v5: > - changed to patchset adding nop_clear_range related code, > - re-insert scratch PTEs on resume > v6: > - use scratch_range > > To: Jani Nikula <jani.nikula@linux.intel.com> > To: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > To: Rodrigo Vivi <rodrigo.vivi@intel.com> > To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> > Cc: intel-gfx@lists.freedesktop.org > Cc: dri-devel@lists.freedesktop.org > Cc: linux-kernel@vger.kernel.org > Cc: Andi Shyti <andi.shyti@linux.intel.com> > Cc: Chris Wilson <chris.p.wilson@linux.intel.com> > Cc: Nirmoy Das <nirmoy.das@intel.com> > > Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> > Queued to drm-intel-gt-next Regards Andrzej > --- > - Link to v5: https://lore.kernel.org/r/20230308-guard_error_capture-v5-0-6d1410d13540@intel.com > > --- > Andrzej Hajda (2): > drm/i915/gt: introduce vm->scratch_range callback > drm/i915: add guard page to ggtt->error_capture > > drivers/gpu/drm/i915/gt/intel_ggtt.c | 43 ++++++++++++++++++++++++++++--- > drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c | 1 + > drivers/gpu/drm/i915/gt/intel_gtt.h | 2 ++ > 3 files changed, 42 insertions(+), 4 deletions(-) > --- > base-commit: 3cd6c251f39c14df9ab711e3eb56e703b359ff54 > change-id: 20230308-guard_error_capture-f3f334eec85f > > Best regards,
This patch tries to diminish plague of DMAR read errors present in CI for ADL*, RPL*, DG2 platforms, see for example [1] (grep DMAR). CI is usually tolerant for these errors, so the scale of the problem is not really visible. To show it I have counted lines containing DMAR read errors in dmesgs produced by CI for all three versions of the patch, but in contrast to v2 I have grepped only for lines containing "PTE Read access". Below stats for kernel w/o patchset vs patched one. v1: 210 vs 0 v2: 201 vs 0 v3: 214 vs 0 Apparently the patchset fixes all common PTE read errors. Changelog: v2: - modified commit message (I hope the diagnosis is correct), - added bug checks to ensure scratch is initialized on gen3 platforms. CI produces strange stacktrace for it suggesting scratch[0] is NULL, to be removed after resolving the issue with gen3 platforms. v3: - removed bug checks, replaced with gen check. v4: - change code for scratch page insertion to support all platforms, - add info in commit message there could be more similar issues v5: - changed to patchset adding nop_clear_range related code, - re-insert scratch PTEs on resume v6: - use scratch_range To: Jani Nikula <jani.nikula@linux.intel.com> To: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> To: Rodrigo Vivi <rodrigo.vivi@intel.com> To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Cc: Andi Shyti <andi.shyti@linux.intel.com> Cc: Chris Wilson <chris.p.wilson@linux.intel.com> Cc: Nirmoy Das <nirmoy.das@intel.com> Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> --- - Link to v5: https://lore.kernel.org/r/20230308-guard_error_capture-v5-0-6d1410d13540@intel.com --- Andrzej Hajda (2): drm/i915/gt: introduce vm->scratch_range callback drm/i915: add guard page to ggtt->error_capture drivers/gpu/drm/i915/gt/intel_ggtt.c | 43 ++++++++++++++++++++++++++++--- drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c | 1 + drivers/gpu/drm/i915/gt/intel_gtt.h | 2 ++ 3 files changed, 42 insertions(+), 4 deletions(-) --- base-commit: 3cd6c251f39c14df9ab711e3eb56e703b359ff54 change-id: 20230308-guard_error_capture-f3f334eec85f Best regards,