| Message ID | 20230425105450.18441-1-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | drm/i915/dsi: ICL+ DSI modeset sequence fixes | expand |
On Tue, 25 Apr 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > A bunch of changes to the ICL+ DSI modeset sequences. > The hope is that these might help with > https://gitlab.freedesktop.org/drm/intel/-/issues/7717 This needs a rebase, and I left some minor comments inline. I can't claim I did an in-depth review, but I also don't think anyone's going to have that as a priority either. I looked at every patch, thought the changes made sense, and pretty much matched what it said on the box, but I did not peruse the specs or other driver code. I'm inclined to rely more on the test results from the issue. Would be great to try to ping the folks in the already closed, related bugs, for testing as well to ensure this doesn't break anything for them. Especially if we're trying to Cc: stable this stuff, if we can't pinpoint the exact change that fixes the reported issue. Anyway, overall on the series, Reviewed-by: Jani Nikula <jani.nikula@intel.com> > > Ville Syrjälä (14): > drm/i915/icl: Do panel power on + reset deassert earlier on icl+ > drm/i915/dsi: Do display on sequence later on icl+ > drm/i915/dsi: Always do panel power up delay on icl+ > drm/i915/dsi: Print the VBT MIPI sequence delay duration > drm/i915/dsi: Split icl+ D-PHY vs. DSI timing steps > drm/i915/dsi: Gate DSI clocks earlier > drm/i915/dsi: Respect power cycle delay on icl+ > drm/i915/dsi: Implement encoder->shutdown() for icl+ > drm/i915/dsi: Move most things from .enable() into .post_disable() > drm/i915/dsi: Do DSC/scaler disable earlier on icl+ > drm/i915/dsi: Respect power_off_delay on icl+ > drm/i915/dsi: Move panel reset+power off to be the last thing > drm/i915/dsi: Grab the crtc from the customary place > drm/i915/dsi: Remove weird has_pch_encoder asserts > > drivers/gpu/drm/i915/display/icl_dsi.c | 127 +++++++++++-------- > drivers/gpu/drm/i915/display/intel_dsi.c | 20 +++ > drivers/gpu/drm/i915/display/intel_dsi.h | 2 + > drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 2 +- > drivers/gpu/drm/i915/display/vlv_dsi.c | 23 ---- > 5 files changed, 100 insertions(+), 74 deletions(-)
From: Ville Syrjälä <ville.syrjala@linux.intel.com> A bunch of changes to the ICL+ DSI modeset sequences. The hope is that these might help with https://gitlab.freedesktop.org/drm/intel/-/issues/7717 Ville Syrjälä (14): drm/i915/icl: Do panel power on + reset deassert earlier on icl+ drm/i915/dsi: Do display on sequence later on icl+ drm/i915/dsi: Always do panel power up delay on icl+ drm/i915/dsi: Print the VBT MIPI sequence delay duration drm/i915/dsi: Split icl+ D-PHY vs. DSI timing steps drm/i915/dsi: Gate DSI clocks earlier drm/i915/dsi: Respect power cycle delay on icl+ drm/i915/dsi: Implement encoder->shutdown() for icl+ drm/i915/dsi: Move most things from .enable() into .post_disable() drm/i915/dsi: Do DSC/scaler disable earlier on icl+ drm/i915/dsi: Respect power_off_delay on icl+ drm/i915/dsi: Move panel reset+power off to be the last thing drm/i915/dsi: Grab the crtc from the customary place drm/i915/dsi: Remove weird has_pch_encoder asserts drivers/gpu/drm/i915/display/icl_dsi.c | 127 +++++++++++-------- drivers/gpu/drm/i915/display/intel_dsi.c | 20 +++ drivers/gpu/drm/i915/display/intel_dsi.h | 2 + drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 2 +- drivers/gpu/drm/i915/display/vlv_dsi.c | 23 ---- 5 files changed, 100 insertions(+), 74 deletions(-)