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[2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id n15-20020a056512388f00b004e96afb1e9asm6608753lft.253.2023.05.04.08.35.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 May 2023 08:35:11 -0700 (PDT) From: Dmitry Baryshkov To: David Airlie , Daniel Vetter , Jani Nikula , Suraj Kandpal , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten Date: Thu, 4 May 2023 18:35:03 +0300 Message-Id: <20230504153511.4007320-1-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v5 0/8] drm/i915: move DSC RC tables to drm_dsc_helper.c X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org, dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Other platforms (msm) will benefit from sharing the DSC config setup functions. This series moves parts of static DSC config data from the i915 driver to the common helpers to be used by other drivers. Note: the RC parameters were cross-checked against config files found in DSC model 2021062, 20161212 (and 20150914). The first patch modifies tables according to those config files, while preserving parameter values using the code. I have not changed one of the values in the pre-SCR config file as it clearly looks like a typo in the config file, considering the table E in DSC 1.1 and in the DSC 1.1 SCR. Chances since v4: - Rebased on top of drm-intel-next - Cut the first 8 patches of the series to ease merging. The rest of the patches will go afterwards. Chances since v3: - Rebased on top of drm-intel-next - Dropped the msm patch to make patchset fully mergeable through drm-intel - Made drm_dsc_set_const_params() ignore rc_model_size, picked up drm_dsc_set_initial_scale_value() patch by Jessica and switched intel_vdsc.c to use those two helpers. - Added a patch to make i915 actually use rc_tgt_offset_high, rc_tgt_offset_low and rc_edge_factor from struct drm_dsc_config. Chances since v2: - Rebased on top of drm-intel-next Chances since v1: - Made drm_dsc_rc_buf_thresh static rather than exporting it - Switched drm_dsc_rc_buf_thresh loop to use ARRAY_SIZE. Added BUILD_BUG_ON's to be sure that array sizes are correct - Fixed rc_parameters_data indentation to be logical and tidy - Fixed drm_dsc_setup_rc_params() kerneldoc - Added a clause to drm_dsc_setup_rc_params() to verify bpp and bpc being set. - Fixed range_bpg_offset programming in calculate_rc_params() - Fixed bpp vs bpc bug in intel_dsc_compute_params() - Added FIXME comment next to the customizations in intel_dsc_compute_params(). Dmitry Baryshkov (8): drm/i915/dsc: change DSC param tables to follow the DSC model drm/i915/dsc: move rc_buf_thresh values to common helper drm/i915/dsc: move DSC tables to DRM DSC helper drm/i915/dsc: stop using interim structure for calculated params drm/display/dsc: use flat array for rc_parameters lookup drm/display/dsc: split DSC 1.2 and DSC 1.1 (pre-SCR) parameters drm/display/dsc: include the rest of pre-SCR parameters drm/display/dsc: add YCbCr 4:2:2 and 4:2:0 RC parameters drivers/gpu/drm/display/drm_dsc_helper.c | 986 ++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_vdsc.c | 443 ++-------- include/drm/display/drm_dsc_helper.h | 9 + 3 files changed, 1042 insertions(+), 396 deletions(-)