From patchwork Fri Jun 30 12:46:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13298155 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0C516EB64D7 for ; Fri, 30 Jun 2023 12:50:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4BBBD10E161; Fri, 30 Jun 2023 12:50:48 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 24F8710E161; Fri, 30 Jun 2023 12:50:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1688129446; x=1719665446; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=S/9TGqERraOpnys/71/+FSQvrIkYSS/I+4esYN9HZGw=; b=d6TDXdUteCapruzyRuJ1XxseiFmuZDKiR2ulST4ibQxFQL8RZj75vTM7 MyA3fWuw107y11xzw+T34PE91eCRb4rcuxbtLnrEkkishmBekgD4aQbsu H+CnKxB8d+VYsFuxxVqpcb5Qu5qevAI83FyJGVBF5Xz6StbUMbAUSXdAx ds3Kr67OQECBEfSu3680vtcLePfn80CBuJ5FFoK7jqeEBC643K+azVsYB L4e2HCX5HIZYcIdxVojDCWP4GsZSDE9lNNKnEKhXntEf8eTl7wfSkOLHH qDvBNdbU1KiUhTXZdrvRCGfPUVEKR5tSdhNcBSGBdVGj58cp7WDM+1JU4 g==; X-IronPort-AV: E=McAfee;i="6600,9927,10756"; a="361232113" X-IronPort-AV: E=Sophos;i="6.01,170,1684825200"; d="scan'208";a="361232113" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jun 2023 05:50:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10756"; a="1048219004" X-IronPort-AV: E=Sophos;i="6.01,170,1684825200"; d="scan'208";a="1048219004" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jun 2023 05:50:43 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Fri, 30 Jun 2023 18:16:32 +0530 Message-Id: <20230630124652.4140932-1-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 00/19] DSC misc fixes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" This series is an attempt to address multiple issues with DSC, scattered in separate existing series. Patches 1-3 are DSC fixes from series to Handle BPC for HDMI2.1 PCON https://patchwork.freedesktop.org/series/107550/ Patches 4-5 are from series DSC fixes for Bigjoiner: https://patchwork.freedesktop.org/series/115773/ Patches 6-12 are from series to add DSC fractional BPP support: https://patchwork.freedesktop.org/series/111391/ Patch 13 is to fix compressed bpc for MST DSC, from Stan's series : https://patchwork.freedesktop.org/series/116179/ Rev2: Addressed review comments from Stan, Ville. Rev3: Split larger patches. Separate out common helpers. Ankit Nautiyal (18): drm/i915/dp: Consider output_format while computing dsc bpp drm/i915/dp: Move compressed bpp check with 420 format inside the helper drm/i915/dp_mst: Use output_format to get the final link bpp drm/i915/dp: Use consistent name for link bpp and compressed bpp drm/i915/dp: Update Bigjoiner interface bits for computing compressed bpp drm/i915/display: Account for DSC not split case while computing cdclk drm/i915/intel_cdclk: Add vdsc with bigjoiner constraints on min_cdlck drm/i915/dp: Remove extra logs for printing DSC info drm/display/dp: Fix the DP DSC Receiver cap size drm/i915/dp: Avoid forcing DSC BPC for MST case drm/i915/dp: Add functions to get min/max src input bpc with DSC drm/i915/dp: Check min bpc DSC limits for dsc_force_bpc also drm/i915/dp: Avoid left shift of DSC output bpp by 4 drm/i915/dp: Rename helper to get DSC max pipe_bpp drm/i915/dp: Separate out functions for edp/DP for computing DSC bpp drm/i915/dp: Add DSC BPC/BPP constraints while selecting pipe bpp with DSC drm/i915/dp: Separate out function to get compressed bpp with joiner drm/i915/dp: Get optimal link config to have best compressed bpp Stanislav Lisovskiy (1): drm/i915: Query compressed bpp properly using correct DPCD and DP Spec info drivers/gpu/drm/i915/display/intel_cdclk.c | 54 +- drivers/gpu/drm/i915/display/intel_dp.c | 608 ++++++++++++++---- drivers/gpu/drm/i915/display/intel_dp.h | 20 +- drivers/gpu/drm/i915/display/intel_dp_mst.c | 76 ++- drivers/gpu/drm/i915/display/intel_vdsc.c | 12 + drivers/gpu/drm/i915/display/intel_vdsc.h | 2 + .../drm/i915/display/skl_universal_plane.c | 4 +- include/drm/display/drm_dp.h | 2 +- 8 files changed, 594 insertions(+), 184 deletions(-)