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[0/2] MTL Degamma implementation

Message ID 20230725083002.3779717-1-chaitanya.kumar.borah@intel.com (mailing list archive)
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Series MTL Degamma implementation | expand

Message

Chaitanya Kumar Borah July 25, 2023, 8:30 a.m. UTC
MTL onwards Degamma LUT/PRE-CSC LUT precision has been increased from
16 bits to 24 bits. Currently, drm framework only supports LUTs up to 16
bit precision. Until a new uapi comes along to support higher bitdepth,
upscale the values sent from userland to 24 bit before writing into the
HW to continue supporting degamma on MTL.

To avoid pipe config mismatch between 24 bit HW lut values and 16 bit
userspace sent values, convert back the 24 bit lut values read from HW
to 16 bit values.

Chaitanya Kumar Borah (2):
  drm/i915/color: Upscale degamma values for MTL
  drm/i915/color: Downscale degamma lut values read from hardware

 drivers/gpu/drm/i915/display/intel_color.c | 28 +++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

Comments

Nautiyal, Ankit K July 27, 2023, 11:57 a.m. UTC | #1
LGTM.

Acked-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

On 7/25/2023 2:00 PM, Chaitanya Kumar Borah wrote:
> MTL onwards Degamma LUT/PRE-CSC LUT precision has been increased from
> 16 bits to 24 bits. Currently, drm framework only supports LUTs up to 16
> bit precision. Until a new uapi comes along to support higher bitdepth,
> upscale the values sent from userland to 24 bit before writing into the
> HW to continue supporting degamma on MTL.
>
> To avoid pipe config mismatch between 24 bit HW lut values and 16 bit
> userspace sent values, convert back the 24 bit lut values read from HW
> to 16 bit values.
>
> Chaitanya Kumar Borah (2):
>    drm/i915/color: Upscale degamma values for MTL
>    drm/i915/color: Downscale degamma lut values read from hardware
>
>   drivers/gpu/drm/i915/display/intel_color.c | 28 +++++++++++++++++++++-
>   1 file changed, 27 insertions(+), 1 deletion(-)
>
Nautiyal, Ankit K July 27, 2023, 1:06 p.m. UTC | #2
Thanks for the patches and the reviews, pushed to drm-intel-next.

Regards,

Ankit

On 7/27/2023 5:27 PM, Nautiyal, Ankit K wrote:
> LGTM.
>
> Acked-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>
> On 7/25/2023 2:00 PM, Chaitanya Kumar Borah wrote:
>> MTL onwards Degamma LUT/PRE-CSC LUT precision has been increased from
>> 16 bits to 24 bits. Currently, drm framework only supports LUTs up to 16
>> bit precision. Until a new uapi comes along to support higher bitdepth,
>> upscale the values sent from userland to 24 bit before writing into the
>> HW to continue supporting degamma on MTL.
>>
>> To avoid pipe config mismatch between 24 bit HW lut values and 16 bit
>> userspace sent values, convert back the 24 bit lut values read from HW
>> to 16 bit values.
>>
>> Chaitanya Kumar Borah (2):
>>    drm/i915/color: Upscale degamma values for MTL
>>    drm/i915/color: Downscale degamma lut values read from hardware
>>
>>   drivers/gpu/drm/i915/display/intel_color.c | 28 +++++++++++++++++++++-
>>   1 file changed, 27 insertions(+), 1 deletion(-)
>>