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[0/4] drm/i915: DPLL code cleanups

Message ID 20231012123522.26045-1-ville.syrjala@linux.intel.com (mailing list archive)
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Series drm/i915: DPLL code cleanups | expand

Message

Ville Syrjälä Oct. 12, 2023, 12:35 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

A bit more cleanup/refactoring in the DPLL code.

Ville Syrjälä (4):
  drm/i915: Use named initializers for DPLL info
  drm/i915: Abstract the extra JSL/EHL DPLL4 power domain better
  drm/i915: Move the DPLL extra power domain handling up one level
  drm/i915: Extract _intel_{enable,disable}_shared_dpll()

 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 187 +++++++++---------
 drivers/gpu/drm/i915/display/intel_dpll_mgr.h |   6 +
 2 files changed, 101 insertions(+), 92 deletions(-)