mbox series

[0/3] Fix some races/bugs in GuC engine busyness

Message ID 20241127174006.190128-1-umesh.nerlige.ramappa@intel.com (mailing list archive)
Headers show
Series Fix some races/bugs in GuC engine busyness | expand

Message

Umesh Nerlige Ramappa Nov. 27, 2024, 5:40 p.m. UTC 
A few races and bugs in PMU busyness implementation are resulting in a wide
range of IGT failures. This series addresses some failures that are easily
reproduced.

To repro the issues, we run a couple iterations of igt@perf_pmu@busy-hang
followed by igt@perf_pmu@most-busy-idle-check-all test.

v2: Review rework

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>

Umesh Nerlige Ramappa (3):
  i915/guc: Reset engine utilization buffer before registration
  i915/guc: Ensure busyness counter increases motonically
  i915/guc: Accumulate active runtime on gt reset

 drivers/gpu/drm/i915/gt/intel_engine_types.h  |  5 +++
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 41 ++++++++++++++++++-
 2 files changed, 44 insertions(+), 2 deletions(-)