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[0/8] drm/i915: Handle vblank delay vs. fastboot and finish DSB plane update enabling

Message ID 20250116201637.22486-1-ville.syrjala@linux.intel.com (mailing list archive)
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Series drm/i915: Handle vblank delay vs. fastboot and finish DSB plane update enabling | expand

Message

Ville Syrjälä Jan. 16, 2025, 8:16 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Try to deal with the fact that the GOP may configure the vblank delay
differently than what we do, without resorting to a full modeset
to fix it up. It's a bit questinable as the relevant register are
single buffered, but so far I've not seen any real issue from frobbing
them live.

And I sucked in the last two patches from my earlier DSB plane update
series, though I tweaked one of them to only add the vblank delay when
VRR is actually possible. That also avoids accidentally adding it for
DSI which wouldn't work because the DSI code doesn't use the normal
transcoder programming stuff.

Cc: Paz Zcharya <pazz@chromium.org>

Ville Syrjälä (8):
  drm/i915: Keep TRANS_VBLANK.vblank_start==0 on ADL+ even when doing
    LRR updates
  drm/i915: Handle interlaced modes in
    intel_set_transcoder_timings_lrr()
  drm/i915: Update TRANS_SET_CONTEXT_LATENCY during LRR updates
  drm/i915: Warn if someone tries to use intel_set_transcoder_timings*()
    on DSI outputs
  drm/i915: Extract lrr_params_changed()
  drm/i915: Allow fastboot to fix up the vblank delay
  drm/i915/dsb: Add support for triggering VRR push with DSB
  drm/i915/dsb: Allow DSB to perform commits when VRR is enabled

 drivers/gpu/drm/i915/display/intel_display.c | 68 ++++++++++++++++++--
 1 file changed, 61 insertions(+), 7 deletions(-)