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[v4,0/3] drm/i915/xe3lpd: Update bandwidth parameters

Message ID 20250310-xe3lpd-bandwidth-update-v4-0-4191964b034d@intel.com (mailing list archive)
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Series drm/i915/xe3lpd: Update bandwidth parameters | expand

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Gustavo Sousa March 10, 2025, 6:57 p.m. UTC 
Bandwidth parameters for Xe3_LPD have been updated with respect to
previous display releases. Encode them into xe3lpd_sa_info and use that
new struct.

Since we are touching intel_bw.c, also take the opportunity convert it
to intel_display.

Changes in v2:
  - Fix typo in patch #2.

Changes in v3:
- Squash patches #1 and #2 into a single one and modify it to convert
  intel_bw.c internally to intel_display (new patch subject is
  "drm/i915/display: Convert intel_bw.c internally to intel_display").
- Add a new patch #2 to convert intel_bw.c externally to intel_display.
- Link to v2: https://lore.kernel.org/r/20250217153550.43909-1-gustavo.sousa@intel.com

Changes in v4:
- Prefer intel_uncore_read() for MCHBAR registers. (Ville)
- Link to v3: https://lore.kernel.org/r/20250307-xe3lpd-bandwidth-update-v3-0-58bbe81f65bf@intel.com

---
Gustavo Sousa (3):
      drm/i915/display: Convert intel_bw.c internally to intel_display
      drm/i915/display: Convert intel_bw.c externally to intel_display
      drm/i915/xe3lpd: Update bandwidth parameters

 drivers/gpu/drm/i915/display/intel_bw.c            | 441 +++++++++++----------
 drivers/gpu/drm/i915/display/intel_bw.h            |   9 +-
 drivers/gpu/drm/i915/display/intel_cdclk.c         |   3 +-
 .../gpu/drm/i915/display/intel_display_driver.c    |   2 +-
 drivers/gpu/drm/i915/display/skl_watermark.c       |  10 +-
 drivers/gpu/drm/i915/i915_driver.c                 |   2 +-
 drivers/gpu/drm/xe/display/xe_display.c            |   2 +-
 7 files changed, 246 insertions(+), 223 deletions(-)
---
base-commit: 335577160971c946611913d1a8e88ee7b00ae804
change-id: 20250228-xe3lpd-bandwidth-update-f011599c0c3e

Best regards,