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[v2,00/11] drm/i915: register style fixes

Message ID cover.1725974820.git.jani.nikula@intel.com (mailing list archive)
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Series drm/i915: register style fixes | expand

Message

Jani Nikula Sept. 10, 2024, 1:28 p.m. UTC 
Amended style fixes from [1] in preparation of doing the
display/non-display register split. This doesn't include the actual
split patch from that series, just the prep.

BR,
Jani.


[1] https://lore.kernel.org/r/cover.1725908151.git.jani.nikula@intel.com


Jani Nikula (11):
  drm/i915/reg: fix transcoder timing register style
  drm/i915/reg: fix g4x pipe data/link m/n register style
  drm/i915/reg: fix pipe conf, stat etc. register style
  drm/i915/reg: fix pipe data/link m/n register style
  drm/i915/reg: fix SKL scaler register style
  drm/i915/reg: fix PCH transcoder timing indentation
  drm/i915/reg: fix PCH transcoder timing and data/link m/n style
  drm/i915/reg: fix DIP CTL register style
  drm/i915/reg: fix small register style issues here and there
  drm/i915/reg: remove unused DSI register macros
  drm/i915/reg: remove superfluous whitespace

 drivers/gpu/drm/i915/display/intel_psr_regs.h |   1 +
 drivers/gpu/drm/i915/i915_reg.h               | 401 +++++++++---------
 2 files changed, 201 insertions(+), 201 deletions(-)