Show patches with: Series = [1/2] drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separate divider value defines       |    State = Action Required       |   2 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[2/2] drm/i915/icl: Get DDI clock for ICL for MG PLL and TBT PLL [1/2] drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separate divider value… - 1 - --- 2018-07-27 Zanoni, Paulo R New
[1/2] drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separate divider value… [1/2] drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separate divider value… - 2 - --- 2018-07-27 Zanoni, Paulo R New