Show patches with: Submitter = None       |    State = Action Required       |    Archived = No       |   32 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v3,2/2] drm/i915: Render decompression support for Gen9 and above - - - 0 0 0 2016-05-13 vandana.kannan@intel.com New
[v2,2/2] drm/i915: Render decompression support for Gen9 and above - - - 0 0 0 2016-04-29 vandana.kannan@intel.com New
[v3] drm/i915: BXT DDI PHY sequence BUN - - - 0 0 0 2016-03-31 vandana.kannan@intel.com New
[v2] drm/i915: BXT DDI PHY sequence BUN - - - 0 0 0 2016-03-31 vandana.kannan@intel.com New
drm/i915: BXT DDI PHY sequence BUN - - - 0 0 0 2016-03-21 vandana.kannan@intel.com New
[2/2] drm/i915: Render decompression support for Gen9 and above - - - 0 0 0 2016-03-18 vandana.kannan@intel.com New
[1/2] drm: Add aux plane verification in addFB2 - - - 0 0 0 2016-03-18 vandana.kannan@intel.com New
[RFC,2/2] drm/i915: Render decompression support for Gen9 - - - 0 0 0 2015-12-09 vandana.kannan@intel.com New
[RFC,1/2] drm: Add aux plane verification in addFB2 - - - 0 0 0 2015-12-09 vandana.kannan@intel.com New
drm/i915: Fix mode_get() for Broxton - - - 0 0 0 2015-12-02 vandana.kannan@intel.com New
drm: Add aux plane verification in addFB2 - - - 0 0 0 2015-11-05 vandana.kannan@intel.com New
drm: Add aux plane verification in addFB2 - - - 0 0 0 2015-11-02 vandana.kannan@intel.com New
[2/2] drm/i915: Add crtc_clock_get for hsw, skl, bxt - - - 0 0 0 2015-10-15 vandana.kannan@intel.com New
[1/2] drm/i915: Create crtc_clock_get function pointers - - - 0 0 0 2015-10-15 vandana.kannan@intel.com New
[RFC] drm/i915: Render decompression support for Gen9 and above - - - 0 0 0 2015-09-04 vandana.kannan@intel.com New
[RFC] drm/i915: Add gen check for fb size - - - 0 0 0 2015-07-10 vandana.kannan@intel.com New
drm/i915: Parsing LFP brightness control from VBT - - - 0 0 0 2015-07-06 vandana.kannan@intel.com New
[v3] drm/i915/bxt: BUNs related to port PLL - - - 0 0 0 2015-07-01 vandana.kannan@intel.com New
[v2] drm/i915/bxt: BUNs related to port PLL - - - 0 0 0 2015-07-01 vandana.kannan@intel.com New
drm/i915/bxt: BUNs related to port PLL - - - 0 0 0 2015-07-01 vandana.kannan@intel.com New
drm/i915/bxt: Calculate port clock - - - 0 0 0 2015-06-30 vandana.kannan@intel.com New
[v5] drm/i915/bxt: eDP Panel Power sequencing - - - 0 0 0 2015-06-18 vandana.kannan@intel.com New
[v4] drm/i915/bxt: eDP Panel Power sequencing - - - 0 0 0 2015-06-12 vandana.kannan@intel.com New
[v4] drm/i915/bxt: eDP Panel Power sequencing - - - 0 0 0 2015-05-13 vandana.kannan@intel.com New
[v2,2/2] drm/i915/bxt: Move around lane stagger calculation - - - 0 0 0 2015-05-13 vandana.kannan@intel.com New
[v3,1/2] drm/i915/bxt: Port PLL programming BUN - - - 0 0 0 2015-05-13 vandana.kannan@intel.com New
[v3] drm/i915/bxt: eDP Panel Power sequencing - - - 0 0 0 2015-05-07 vandana.kannan@intel.com New
[2/2] drm/i915/bxt: Move around lane stagger calculation - - - 0 0 0 2015-05-07 vandana.kannan@intel.com New
[v2,1/2] drm/i915/bxt: Port PLL programming BUN - - - 0 0 0 2015-05-07 vandana.kannan@intel.com New
drm/i915/bxt: BLC implementation - - - 0 0 0 2015-05-05 vandana.kannan@intel.com New
drm/i915/bxt: Port PLL programming BUN - - - 0 0 0 2015-05-04 vandana.kannan@intel.com New
drm/i915: eDP Panel Power sequencing - - - 0 0 0 2015-05-04 vandana.kannan@intel.com New