From patchwork Tue Oct 7 08:43:46 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: sonika.jindal@intel.com X-Patchwork-Id: 5044001 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 72650C11AB for ; Tue, 7 Oct 2014 08:44:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 829DD20179 for ; Tue, 7 Oct 2014 08:44:36 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 76C2220172 for ; Tue, 7 Oct 2014 08:44:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 871E789FEC; Tue, 7 Oct 2014 01:44:34 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 626DF89FEC for ; Tue, 7 Oct 2014 01:44:33 -0700 (PDT) Received: from azsmga001.ch.intel.com ([10.2.17.19]) by orsmga101.jf.intel.com with ESMTP; 07 Oct 2014 01:44:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,668,1406617200"; d="scan'208";a="482470331" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by azsmga001.ch.intel.com with ESMTP; 07 Oct 2014 01:43:50 -0700 Received: from fmsmsx101.amr.corp.intel.com (10.18.124.199) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.195.1; Tue, 7 Oct 2014 01:43:50 -0700 Received: from bgsmsx152.gar.corp.intel.com (10.224.48.50) by fmsmsx101.amr.corp.intel.com (10.18.124.199) with Microsoft SMTP Server (TLS) id 14.3.195.1; Tue, 7 Oct 2014 01:43:49 -0700 Received: from bgsmsx104.gar.corp.intel.com ([169.254.5.197]) by BGSMSX152.gar.corp.intel.com ([169.254.6.175]) with mapi id 14.03.0195.001; Tue, 7 Oct 2014 14:13:46 +0530 From: "Jindal, Sonika" To: "intel-gfx@lists.freedesktop.org" Thread-Topic: [PATCH] drm/i915: Add rotation support for cursor plane Thread-Index: AQHP0Ll6Jfn4qJQqNkOaW2zyUPIyyZwkc6cQ Date: Tue, 7 Oct 2014 08:43:46 +0000 Message-ID: <000C66961D35964B9714611E548C10AD0C0E9815@BGSMSX104.gar.corp.intel.com> References: <1410766511-18879-2-git-send-email-sonika.jindal@intel.com> <1410767028-19227-1-git-send-email-sonika.jindal@intel.com> In-Reply-To: <1410767028-19227-1-git-send-email-sonika.jindal@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.223.10.10] MIME-Version: 1.0 Cc: "Kamble, Sagar A" Subject: Re: [Intel-gfx] [PATCH] drm/i915: Add rotation support for cursor plane X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi, Did anybody get a chance to look at this patch? Thanks, Sonika -----Original Message----- From: Jindal, Sonika Sent: Monday, September 15, 2014 1:14 PM To: intel-gfx@lists.freedesktop.org Cc: Ville Syrjälä; Kamble, Sagar A; Jindal, Sonika Subject: [PATCH] drm/i915: Add rotation support for cursor plane From: Ville Syrjälä The cursor plane also supports 180 degree rotation. Add a new "cursor-rotation" property on the crtc which controls this. Unlike sprites, the cursor has a fixed size, so if you have a small cursor image with the rest of the bo filled by transparent pixels, simply flipping the rotation property will cause the visible part of the cursor to shift. This is something to keep in mind when using cursor rotation. v2: Fix gen4/vlv by offsetting the base address appropriately v3: Removing cursor-rotation property and using rotation property on cursor plane. v4: Changing the author name back to Ville. Testcase: kms_rotation_crc Cc: Sagar Kamble Signed-off-by: Ville Syrjälä Signed-off-by: Sonika Jindal --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_display.c | 26 +++++++++++++++++++++++++- 2 files changed, 26 insertions(+), 1 deletion(-) cursor->max_downscale = 1; cursor->pipe = pipe; cursor->plane = pipe; + cursor->rotation = BIT(DRM_ROTATE_0); drm_universal_plane_init(dev, &cursor->base, 0, &intel_cursor_plane_funcs, intel_cursor_formats, ARRAY_SIZE(intel_cursor_formats), DRM_PLANE_TYPE_CURSOR); + + if (INTEL_INFO(dev)->gen >= 4) { + if (!dev->mode_config.rotation_property) + dev->mode_config.rotation_property = + drm_mode_create_rotation_property(dev, + BIT(DRM_ROTATE_0) | + BIT(DRM_ROTATE_180)); + if (dev->mode_config.rotation_property) + drm_object_attach_property(&cursor->base.base, + dev->mode_config.rotation_property, + cursor->rotation); + } + return &cursor->base; } -- 1.7.10.4 Reviewed-by: Matt Roper Tested-by: Matt Roper diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 15c0eaa..5a9fab9 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4162,6 +4162,7 @@ enum punit_power_well { #define MCURSOR_PIPE_A 0x00 #define MCURSOR_PIPE_B (1 << 28) #define MCURSOR_GAMMA_ENABLE (1 << 26) +#define CURSOR_ROTATE_180 (1<<15) #define CURSOR_TRICKLE_FEED_DISABLE (1 << 14) #define _CURABASE 0x70084 #define _CURAPOS 0x70088 diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 122ac6e..8c83bcc 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -8247,6 +8247,9 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base) if (IS_HASWELL(dev) || IS_BROADWELL(dev)) cntl |= CURSOR_PIPE_CSC_ENABLE; + if (to_intel_plane(crtc->cursor)->rotation == BIT(DRM_ROTATE_180)) + cntl |= CURSOR_ROTATE_180; + if (intel_crtc->cursor_cntl != cntl) { I915_WRITE(CURCNTR(pipe), cntl); POSTING_READ(CURCNTR(pipe)); @@ -8302,6 +8305,13 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc, I915_WRITE(CURPOS(pipe), pos); + /* ILK+ do this automagically */ + if (HAS_GMCH_DISPLAY(dev) && + to_intel_plane(crtc->cursor)->rotation == BIT(DRM_ROTATE_180)) { + base += (intel_crtc->cursor_height * + intel_crtc->cursor_width - 1) * 4; + } + if (IS_845G(dev) || IS_I865G(dev)) i845_update_cursor(crtc, base); else @@ -8453,7 +8463,6 @@ static int intel_crtc_cursor_set_obj(struct drm_crtc *crtc, mutex_unlock(&dev->struct_mutex); old_width = intel_crtc->cursor_width; - intel_crtc->cursor_addr = addr; intel_crtc->cursor_bo = obj; intel_crtc->cursor_width = width; @@ -12074,6 +12083,7 @@ static const struct drm_plane_funcs intel_cursor_plane_funcs = { .update_plane = intel_cursor_plane_update, .disable_plane = intel_cursor_plane_disable, .destroy = intel_plane_destroy, + .set_property = intel_plane_set_property, }; static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev, @@ -12089,12 +12099,26 @@ static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev,