diff mbox

intel_gpu_dump: add support for IGDNG

Message ID 1251868770.9743.45.camel@xhh-945g (mailing list archive)
State Not Applicable
Headers show

Commit Message

Xiang, Haihao Sept. 2, 2009, 5:19 a.m. UTC
On Wed, 2009-09-02 at 13:11 +0800, Xiang, Haihao wrote:
> ---
>  lib/intel_chipset.h |   10 +++++++++-
>  1 files changed, 9 insertions(+), 1 deletions(-)
> 
> diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
> index 4593d90..03ba0b2 100755
> --- a/lib/intel_chipset.h
> +++ b/lib/intel_chipset.h
> @@ -67,6 +67,9 @@
>  #define PCI_CHIP_G45_G                  0x2E22
>  #define PCI_CHIP_G41_G                  0x2E32
>  
> +#define PCI_CHIP_ILD_G                  0x0042
> +#define PCI_CHIP_ILM_G                  0x0046
> +
>  #define IS_MOBILE(devid)	(devid == PCI_CHIP_I855_GM || \
>  				 devid == PCI_CHIP_I915_GM || \
>  				 devid == PCI_CHIP_I945_GM || \
> @@ -82,6 +85,10 @@
>  #define IS_GM45(devid)          (devid == PCI_CHIP_GM45_GM)
>  #define IS_G4X(devid)		(IS_G45(devid) || IS_GM45(devid))
>  
> +#define IS_ILD(devid)           (devid == PCI_CHIP_ILD_G)
> +#define IS_ILM(devid)           (devid == PCI_CHIP_ILM_G)
> +#define IS_IGDNG(devid)         (IS_ILD(devid) || IS_ILM(devid))
> +
>  #define IS_915(devid)		(devid == PCI_CHIP_I915_G || \
>  				 devid == PCI_CHIP_E7221_G || \
>  				 devid == PCI_CHIP_I915_GM)
> @@ -99,7 +106,8 @@
>  				 devid == PCI_CHIP_I965_GM || \
>  				 devid == PCI_CHIP_I965_GME || \
>  				 devid == PCI_CHIP_I946_GZ || \
> -				 IS_G4X(devid))
> +				 IS_G4X(devid) || \
> +				 IS_IGDNG(devid))
>  
>  #define IS_9XX(devid)		(IS_915(devid) || \
>  				 IS_945(devid) || \

Need to fix STATE_BASE_ADDRESS output on IGDNG

---
 lib/intel_chipset.h    |   10 +++++++-
 tools/intel_gpu_dump.c |   58 +++++++++++++++++++++++++++++++++++------------
 2 files changed, 52 insertions(+), 16 deletions(-)
diff mbox

Patch

diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index 4593d90..03ba0b2 100755
--- a/lib/intel_chipset.h
+++ b/lib/intel_chipset.h
@@ -67,6 +67,9 @@ 
 #define PCI_CHIP_G45_G                  0x2E22
 #define PCI_CHIP_G41_G                  0x2E32
 
+#define PCI_CHIP_ILD_G                  0x0042
+#define PCI_CHIP_ILM_G                  0x0046
+
 #define IS_MOBILE(devid)	(devid == PCI_CHIP_I855_GM || \
 				 devid == PCI_CHIP_I915_GM || \
 				 devid == PCI_CHIP_I945_GM || \
@@ -82,6 +85,10 @@ 
 #define IS_GM45(devid)          (devid == PCI_CHIP_GM45_GM)
 #define IS_G4X(devid)		(IS_G45(devid) || IS_GM45(devid))
 
+#define IS_ILD(devid)           (devid == PCI_CHIP_ILD_G)
+#define IS_ILM(devid)           (devid == PCI_CHIP_ILM_G)
+#define IS_IGDNG(devid)         (IS_ILD(devid) || IS_ILM(devid))
+
 #define IS_915(devid)		(devid == PCI_CHIP_I915_G || \
 				 devid == PCI_CHIP_E7221_G || \
 				 devid == PCI_CHIP_I915_GM)
@@ -99,7 +106,8 @@ 
 				 devid == PCI_CHIP_I965_GM || \
 				 devid == PCI_CHIP_I965_GME || \
 				 devid == PCI_CHIP_I946_GZ || \
-				 IS_G4X(devid))
+				 IS_G4X(devid) || \
+				 IS_IGDNG(devid))
 
 #define IS_9XX(devid)		(IS_915(devid) || \
 				 IS_945(devid) || \
diff --git a/tools/intel_gpu_dump.c b/tools/intel_gpu_dump.c
index 791f497..a5b1b77 100644
--- a/tools/intel_gpu_dump.c
+++ b/tools/intel_gpu_dump.c
@@ -1472,7 +1472,7 @@  i965_decode_urb_fence(uint32_t *data, uint32_t hw_offset, int len, int count,
 }
 
 static int
-decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, int *failures)
+decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, int *failures, uint32_t devid)
 {
     unsigned int opcode, len;
     int i;
@@ -1528,9 +1528,11 @@  decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, int *failures)
 			data[1] >> 6, data[1] & 0x3f);
 	return len;
     case 0x6101:
-	if (len != 6)
+	if ((IS_IGDNG(devid) && len != 8) ||
+            (!IS_IGDNG(devid) && len != 6))
 	    fprintf(out, "Bad count in STATE_BASE_ADDRESS\n");
-	if (count < 6)
+	if ((IS_IGDNG(devid) && count < 8) ||
+            (!IS_IGDNG(devid) && count < 6))
 	    BUFFER_FAIL(count, len, "STATE_BASE_ADDRESS");
 
 	instr_out(data, hw_offset, 0,
@@ -1554,17 +1556,43 @@  decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, int *failures)
 	} else
 	    instr_out(data, hw_offset, 3, "Indirect state not updated\n");
 
-	if (data[4] & 1) {
-	    instr_out(data, hw_offset, 4, "General state upper bound 0x%08x\n",
-		      data[4] & ~1);
-	} else
-	    instr_out(data, hw_offset, 4, "General state not updated\n");
-
-	if (data[5] & 1) {
-	    instr_out(data, hw_offset, 5, "Indirect state upper bound 0x%08x\n",
-		      data[5] & ~1);
-	} else
-	    instr_out(data, hw_offset, 5, "Indirect state not updated\n");
+        if (IS_IGDNG(devid)) {
+            if (data[4] & 1) {
+                instr_out(data, hw_offset, 4, "Instruction base address at 0x%08x\n",
+                          data[4] & ~1);
+            } else
+                instr_out(data, hw_offset, 4, "Instruction base address not updated\n");
+
+            if (data[5] & 1) {
+                instr_out(data, hw_offset, 5, "General state upper bound 0x%08x\n",
+                          data[4] & ~1);
+            } else
+                instr_out(data, hw_offset, 5, "General state not updated\n");
+
+            if (data[6] & 1) {
+                instr_out(data, hw_offset, 6, "Indirect state upper bound 0x%08x\n",
+                          data[5] & ~1);
+            } else
+                instr_out(data, hw_offset, 6, "Indirect state not updated\n");
+
+            if (data[7] & 1) {
+                instr_out(data, hw_offset, 7, "Instruction access upper bound 0x%08x\n",
+                          data[5] & ~1);
+            } else
+                instr_out(data, hw_offset, 7, "Instruction access upper bound not updated\n");
+        } else {
+            if (data[4] & 1) {
+                instr_out(data, hw_offset, 4, "General state upper bound 0x%08x\n",
+                          data[4] & ~1);
+            } else
+                instr_out(data, hw_offset, 4, "General state not updated\n");
+
+            if (data[5] & 1) {
+                instr_out(data, hw_offset, 5, "Indirect state upper bound 0x%08x\n",
+                          data[5] & ~1);
+            } else
+                instr_out(data, hw_offset, 5, "Indirect state not updated\n");
+        }
 
 	return len;
     case 0x7800:
@@ -1880,7 +1908,7 @@  intel_decode(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid)
 	case 0x3:
 	    if (IS_965(devid)) {
 		index += decode_3d_965(data + index, count - index,
-				       hw_offset + index * 4, &failures);
+				       hw_offset + index * 4, &failures, devid);
 	    } else if (IS_9XX(devid)) {
 		index += decode_3d(data + index, count - index,
 				   hw_offset + index * 4, &failures);