From patchwork Thu Feb 4 21:05:12 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 77214 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o14L69ec009202 for ; Thu, 4 Feb 2010 21:06:49 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 681099F5C8; Thu, 4 Feb 2010 13:05:56 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail.ffwll.ch (cable-static-49-187.intergga.ch [157.161.49.187]) by gabe.freedesktop.org (Postfix) with ESMTP id B658F9F5CD for ; Thu, 4 Feb 2010 13:05:51 -0800 (PST) Received: by mail.ffwll.ch (Postfix, from userid 1000) id D666020C2C0; Thu, 4 Feb 2010 22:05:50 +0100 (CET) X-Spam-ASN: X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on orange.ffwll.ch X-Spam-Level: X-Spam-Hammy: 0.000-+--struct, 0.000-+--100644, 0.000-+--signed-off-by X-Spam-Status: No, score=-1.2 required=6.0 tests=ALL_TRUSTED,BAYES_00, FH_DATE_PAST_20XX autolearn=no version=3.2.5 X-Spam-Spammy: 0.970-+--H*m:ffwll, 0.965-+--H*Ad:U*daniel.vetter, 0.955-+--H*r:mail.ffwll.ch Received: from biene (unknown [192.168.23.129]) by mail.ffwll.ch (Postfix) with ESMTP id 1342E20C2C1; Thu, 4 Feb 2010 22:05:20 +0100 (CET) Received: from daniel by biene with local (Exim 4.71) (envelope-from ) id 1Nd8t9-0004j9-Gf; Thu, 04 Feb 2010 22:05:23 +0100 From: Daniel Vetter To: intel-gfx@lists.freedesktop.org Date: Thu, 4 Feb 2010 22:05:12 +0100 Message-Id: <1265317513-27723-13-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.6.6.1 In-Reply-To: <1265317513-27723-12-git-send-email-daniel.vetter@ffwll.ch> References: <1265317513-27723-1-git-send-email-daniel.vetter@ffwll.ch> <1265317513-27723-2-git-send-email-daniel.vetter@ffwll.ch> <1265317513-27723-3-git-send-email-daniel.vetter@ffwll.ch> <1265317513-27723-4-git-send-email-daniel.vetter@ffwll.ch> <1265317513-27723-5-git-send-email-daniel.vetter@ffwll.ch> <1265317513-27723-6-git-send-email-daniel.vetter@ffwll.ch> <1265317513-27723-7-git-send-email-daniel.vetter@ffwll.ch> <1265317513-27723-8-git-send-email-daniel.vetter@ffwll.ch> <1265317513-27723-9-git-send-email-daniel.vetter@ffwll.ch> <1265317513-27723-10-git-send-email-daniel.vetter@ffwll.ch> <1265317513-27723-11-git-send-email-daniel.vetter@ffwll.ch> <1265317513-27723-12-git-send-email-daniel.vetter@ffwll.ch> Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 12/13] drm/i915: infrastructure to track pipelined fence setup X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.9 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Thu, 04 Feb 2010 21:06:49 +0000 (UTC) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index c684d0e..4fc2255 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -129,6 +129,7 @@ struct drm_i915_master_private { struct drm_i915_fence_reg { struct drm_gem_object *obj; uint32_t last_rendering_seqno; + uint32_t setup_seqno; struct list_head lru_list; }; diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 1fd7a65..5e90587 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1795,6 +1795,7 @@ i915_gem_retire_requests(struct drm_device *dev) { drm_i915_private_t *dev_priv = dev->dev_private; uint32_t seqno; + int i; if (!dev_priv->hw_status_page || list_empty(&dev_priv->mm.request_list)) return; @@ -1826,6 +1827,13 @@ i915_gem_retire_requests(struct drm_device *dev) i915_user_irq_put(dev); dev_priv->trace_irq_seqno = 0; } + + /* Update pipelined fences that have been setup by the gpu. */ + for (i = dev_priv->fence_reg_start; i < dev_priv->num_fence_regs; i++) { + struct drm_i915_fence_reg *reg = &dev_priv->fence_regs[i]; + if (i915_seqno_passed(seqno, reg->setup_seqno)) + reg->setup_seqno = 0; + } } void @@ -2506,6 +2514,16 @@ i915_gem_object_get_fence_reg(struct drm_gem_object *obj, int pipelined) if (obj_priv->fence_reg != I915_FENCE_REG_NONE) { reg = &dev_priv->fence_regs[obj_priv->fence_reg]; list_move_tail(®->lru_list, &dev_priv->mm.fence_list); + + /* Wait for the gpu to setup the fence it it was pipelined. */ + if (!pipelined && reg->setup_seqno != 0) { + ret = i915_wait_request(dev, reg->setup_seqno); + if (ret != 0) + return ret; + + reg->setup_seqno = 0; + } + return 0; } @@ -2539,6 +2557,11 @@ i915_gem_object_get_fence_reg(struct drm_gem_object *obj, int pipelined) reg->obj = obj; + if (pipelined) + reg->setup_seqno = dev_priv->mm.next_gem_seqno; + else + reg->setup_seqno = 0; + if (pipelined && reg->last_rendering_seqno != 0) { ret = i915_wait_request(dev, reg->last_rendering_seqno); if (ret != 0)