From patchwork Thu Feb 4 21:05:06 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 77207 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o14L5v5v008374 for ; Thu, 4 Feb 2010 21:06:37 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 862AE9F59E; Thu, 4 Feb 2010 13:05:41 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail.ffwll.ch (cable-static-49-187.intergga.ch [157.161.49.187]) by gabe.freedesktop.org (Postfix) with ESMTP id E79539F57F for ; Thu, 4 Feb 2010 13:05:38 -0800 (PST) Received: by mail.ffwll.ch (Postfix, from userid 1000) id 6729420C2B7; Thu, 4 Feb 2010 22:05:37 +0100 (CET) X-Spam-ASN: X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on orange.ffwll.ch X-Spam-Level: X-Spam-Hammy: 0.000-+--struct, 0.000-+--100644, 0.000-+--signed-off-by X-Spam-Status: No, score=-1.2 required=6.0 tests=ALL_TRUSTED,BAYES_00, FH_DATE_PAST_20XX autolearn=no version=3.2.5 X-Spam-Spammy: 0.970-+--H*m:ffwll, 0.965-+--H*Ad:U*daniel.vetter, 0.955-+--H*r:mail.ffwll.ch Received: from biene (unknown [192.168.23.129]) by mail.ffwll.ch (Postfix) with ESMTP id 8E58E20C2BA; Thu, 4 Feb 2010 22:05:16 +0100 (CET) Received: from daniel by biene with local (Exim 4.71) (envelope-from ) id 1Nd8t6-0004gD-FA; Thu, 04 Feb 2010 22:05:20 +0100 From: Daniel Vetter To: intel-gfx@lists.freedesktop.org Date: Thu, 4 Feb 2010 22:05:06 +0100 Message-Id: <1265317513-27723-7-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.6.6.1 In-Reply-To: <1265317513-27723-6-git-send-email-daniel.vetter@ffwll.ch> References: <1265317513-27723-1-git-send-email-daniel.vetter@ffwll.ch> <1265317513-27723-2-git-send-email-daniel.vetter@ffwll.ch> <1265317513-27723-3-git-send-email-daniel.vetter@ffwll.ch> <1265317513-27723-4-git-send-email-daniel.vetter@ffwll.ch> <1265317513-27723-5-git-send-email-daniel.vetter@ffwll.ch> <1265317513-27723-6-git-send-email-daniel.vetter@ffwll.ch> Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 06/13] drm/i915: move the wait_rendering call into flush_gpu_write_domain X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.9 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Thu, 04 Feb 2010 21:06:37 +0000 (UTC) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 8b4d159..015c06a 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -36,7 +36,8 @@ #define I915_GEM_GPU_DOMAINS (~(I915_GEM_DOMAIN_CPU | I915_GEM_DOMAIN_GTT)) -static void i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj); +static int i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj, + int pipelined); static void i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj); static void i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj); static int i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, @@ -2606,8 +2607,7 @@ i915_gem_object_put_fence_reg(struct drm_gem_object *obj) if (!IS_I965G(dev)) { int ret; - i915_gem_object_flush_gpu_write_domain(obj); - ret = i915_gem_object_wait_rendering(obj); + ret = i915_gem_object_flush_gpu_write_domain(obj, 0); if (ret != 0) return ret; } @@ -2756,24 +2756,32 @@ i915_gem_clflush_object(struct drm_gem_object *obj) } /** Flushes any GPU write domain for the object if it's dirty. */ -static void -i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj) +static int +i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj, + int pipelined) { struct drm_device *dev = obj->dev; - uint32_t old_write_domain; + uint32_t old_write_domain, seqno; + + if ((obj->write_domain & I915_GEM_GPU_DOMAINS) != 0) { + old_write_domain = obj->write_domain; + i915_gem_flush(dev, 0, obj->write_domain); + if (!pipelined) { + seqno = i915_add_request(dev, NULL); + if (seqno == 0) + return -ENOMEM; + } + BUG_ON(obj->write_domain); - if ((obj->write_domain & I915_GEM_GPU_DOMAINS) == 0) - return; + trace_i915_gem_object_change_domain(obj, + obj->read_domains, + old_write_domain); + } - /* Queue the GPU write cache flushing we need. */ - old_write_domain = obj->write_domain; - i915_gem_flush(dev, 0, obj->write_domain); - (void) i915_add_request(dev, NULL); - BUG_ON(obj->write_domain); + if (pipelined) + return 0; - trace_i915_gem_object_change_domain(obj, - obj->read_domains, - old_write_domain); + return i915_gem_object_wait_rendering(obj); } /** Flushes the GTT write domain for the object if it's dirty. */ @@ -2828,7 +2836,7 @@ i915_gem_object_flush_write_domain(struct drm_gem_object *obj) i915_gem_object_flush_cpu_write_domain(obj); break; default: - i915_gem_object_flush_gpu_write_domain(obj); + i915_gem_object_flush_gpu_write_domain(obj, 1); break; } } @@ -2850,9 +2858,7 @@ i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, int write) if (obj_priv->gtt_space == NULL) return -EINVAL; - i915_gem_object_flush_gpu_write_domain(obj); - /* Wait on any GPU rendering and flushing to occur. */ - ret = i915_gem_object_wait_rendering(obj); + ret = i915_gem_object_flush_gpu_write_domain(obj, 0); if (ret != 0) return ret; @@ -2899,9 +2905,7 @@ i915_gem_object_set_to_display_plane(struct drm_gem_object *obj) if (obj_priv->gtt_space == NULL) return -EINVAL; - i915_gem_object_flush_gpu_write_domain(obj); - /* Wait on any GPU rendering and flushing to occur. */ - ret = i915_gem_object_wait_rendering(obj); + ret = i915_gem_object_flush_gpu_write_domain(obj, 0); if (ret != 0) return ret; @@ -2939,9 +2943,7 @@ i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write) uint32_t old_write_domain, old_read_domains; int ret; - i915_gem_object_flush_gpu_write_domain(obj); - /* Wait on any GPU rendering and flushing to occur. */ - ret = i915_gem_object_wait_rendering(obj); + ret = i915_gem_object_flush_gpu_write_domain(obj, 0); if (ret != 0) return ret; @@ -3229,9 +3231,7 @@ i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj, if (offset == 0 && size == obj->size) return i915_gem_object_set_to_cpu_domain(obj, 0); - i915_gem_object_flush_gpu_write_domain(obj); - /* Wait on any GPU rendering and flushing to occur. */ - ret = i915_gem_object_wait_rendering(obj); + ret = i915_gem_object_flush_gpu_write_domain(obj, 0); if (ret != 0) return ret; i915_gem_object_flush_gtt_write_domain(obj);