From patchwork Wed Mar 10 22:45:21 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 84738 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o2AMks65006699 for ; Wed, 10 Mar 2010 22:47:34 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 74E039F68A; Wed, 10 Mar 2010 14:46:48 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from orsmga101.jf.intel.com (mga06.intel.com [134.134.136.21]) by gabe.freedesktop.org (Postfix) with ESMTP id 2EC4C9F643 for ; Wed, 10 Mar 2010 14:46:26 -0800 (PST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 10 Mar 2010 14:43:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.49,616,1262592000"; d="scan'208";a="499618635" Received: from unknown (HELO localhost.localdomain) ([10.255.13.214]) by orsmga002.jf.intel.com with ESMTP; 10 Mar 2010 14:45:38 -0800 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Wed, 10 Mar 2010 22:45:21 +0000 Message-Id: <1268261124-13653-35-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 1.7.0 In-Reply-To: <1268261124-13653-1-git-send-email-chris@chris-wilson.co.uk> References: <1268261124-13653-1-git-send-email-chris@chris-wilson.co.uk> Subject: [Intel-gfx] [PATCH 34/37] drm/i915: Mark opregion as iomem and access appropriately. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Wed, 10 Mar 2010 22:47:34 +0000 (UTC) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index eada25f..9a8aef7 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -113,10 +113,10 @@ struct opregion_swsci; struct opregion_asle; struct intel_opregion { - struct opregion_header *header; - struct opregion_acpi *acpi; - struct opregion_swsci *swsci; - struct opregion_asle *asle; + struct opregion_header __iomem *header; + struct opregion_acpi __iomem *acpi; + struct opregion_swsci __iomem *swsci; + struct opregion_asle __iomem *asle; int enabled; }; diff --git a/drivers/gpu/drm/i915/i915_opregion.c b/drivers/gpu/drm/i915/i915_opregion.c index 7cc8410..743ebe6 100644 --- a/drivers/gpu/drm/i915/i915_opregion.c +++ b/drivers/gpu/drm/i915/i915_opregion.c @@ -150,7 +150,7 @@ struct opregion_asle { static u32 asle_set_backlight(struct drm_device *dev, u32 bclp) { struct drm_i915_private *dev_priv = dev->dev_private; - struct opregion_asle *asle = dev_priv->opregion.asle; + struct opregion_asle __iomem *asle = dev_priv->opregion.asle; u32 blc_pwm_ctl, blc_pwm_ctl2; u32 max_backlight, level, shift; @@ -181,7 +181,7 @@ static u32 asle_set_backlight(struct drm_device *dev, u32 bclp) level = (bclp * max_backlight) / 255; I915_WRITE(BLC_PWM_CTL, blc_pwm_ctl | (level << shift)); } - asle->cblv = (bclp*0x64)/0xff | ASLE_CBLV_VALID; + iowrite32((bclp*0x64)/0xff | ASLE_CBLV_VALID, &asle->cblv); return 0; } @@ -218,39 +218,38 @@ static u32 asle_set_pfit(struct drm_device *dev, u32 pfit) void opregion_asle_intr(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - struct opregion_asle *asle = dev_priv->opregion.asle; + struct opregion_asle __iomem *asle = dev_priv->opregion.asle; u32 asle_stat = 0; u32 asle_req; if (!asle) return; - asle_req = asle->aslc & ASLE_REQ_MSK; - + asle_req = ioread32(&asle->aslc) & ASLE_REQ_MSK; if (!asle_req) { DRM_DEBUG_DRIVER("non asle set request??\n"); return; } if (asle_req & ASLE_SET_ALS_ILLUM) - asle_stat |= asle_set_als_illum(dev, asle->alsi); + asle_stat |= asle_set_als_illum(dev, ioread32(&asle->alsi)); if (asle_req & ASLE_SET_BACKLIGHT) - asle_stat |= asle_set_backlight(dev, asle->bclp); + asle_stat |= asle_set_backlight(dev, ioread32(&asle->bclp)); if (asle_req & ASLE_SET_PFIT) - asle_stat |= asle_set_pfit(dev, asle->pfit); + asle_stat |= asle_set_pfit(dev, ioread32(&asle->pfit)); if (asle_req & ASLE_SET_PWM_FREQ) - asle_stat |= asle_set_pwm_freq(dev, asle->pfmb); + asle_stat |= asle_set_pwm_freq(dev, ioread32(&asle->pfmb)); - asle->aslc = asle_stat; + iowrite32(asle_stat, &asle->aslc); } static u32 asle_set_backlight_ironlake(struct drm_device *dev, u32 bclp) { struct drm_i915_private *dev_priv = dev->dev_private; - struct opregion_asle *asle = dev_priv->opregion.asle; + struct opregion_asle __iomem *asle = dev_priv->opregion.asle; u32 cpu_pwm_ctl, pch_pwm_ctl2; u32 max_backlight, level; @@ -272,7 +271,7 @@ static u32 asle_set_backlight_ironlake(struct drm_device *dev, u32 bclp) /* write the updated PWM frequency */ I915_WRITE(BLC_PWM_CPU_CTL, cpu_pwm_ctl | level); - asle->cblv = (bclp*0x64)/0xff | ASLE_CBLV_VALID; + iowrite32((bclp*0x64)/0xff | ASLE_CBLV_VALID, &asle->cblv); return 0; } @@ -280,15 +279,14 @@ static u32 asle_set_backlight_ironlake(struct drm_device *dev, u32 bclp) void ironlake_opregion_gse_intr(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - struct opregion_asle *asle = dev_priv->opregion.asle; + struct opregion_asle __iomem *asle = dev_priv->opregion.asle; u32 asle_stat = 0; u32 asle_req; if (!asle) return; - asle_req = asle->aslc & ASLE_REQ_MSK; - + asle_req = ioread32(&asle->aslc) & ASLE_REQ_MSK; if (!asle_req) { DRM_DEBUG_DRIVER("non asle set request??\n"); return; @@ -300,7 +298,7 @@ void ironlake_opregion_gse_intr(struct drm_device *dev) } if (asle_req & ASLE_SET_BACKLIGHT) - asle_stat |= asle_set_backlight_ironlake(dev, asle->bclp); + asle_stat |= asle_set_backlight_ironlake(dev, ioread32(&asle->bclp)); if (asle_req & ASLE_SET_PFIT) { DRM_DEBUG_DRIVER("Pfit is not supported\n"); @@ -312,7 +310,7 @@ void ironlake_opregion_gse_intr(struct drm_device *dev) asle_stat |= ASLE_PWM_FREQ_FAILED; } - asle->aslc = asle_stat; + iowrite32(asle_stat, &asle->aslc); } #define ASLE_ALS_EN (1<<0) #define ASLE_BLC_EN (1<<1) @@ -322,7 +320,7 @@ void ironlake_opregion_gse_intr(struct drm_device *dev) void opregion_enable_asle(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - struct opregion_asle *asle = dev_priv->opregion.asle; + struct opregion_asle __iomem *asle = dev_priv->opregion.asle; if (asle) { if (IS_MOBILE(dev)) { @@ -334,9 +332,9 @@ void opregion_enable_asle(struct drm_device *dev) irqflags); } - asle->tche = ASLE_ALS_EN | ASLE_BLC_EN | ASLE_PFIT_EN | - ASLE_PFMB_EN; - asle->ardy = 1; + iowrite32(ASLE_ALS_EN | ASLE_BLC_EN | ASLE_PFIT_EN | ASLE_PFMB_EN, + &asle->tche); + iowrite32(1, &asle->ardy); } } @@ -356,13 +354,13 @@ static int intel_opregion_video_event(struct notifier_block *nb, future, but right now we just indicate to the firmware that the request has been handled */ - struct opregion_acpi *acpi; + struct opregion_acpi __iomem *acpi; if (!system_opregion) return NOTIFY_DONE; acpi = system_opregion->acpi; - acpi->csts = 0; + iowrite32(0, &acpi->csts); return NOTIFY_OK; } @@ -413,20 +411,35 @@ static void intel_didl_outputs(struct drm_device *dev) output_type = ACPI_LVDS_OUTPUT; break; } - opregion->acpi->didl[i] |= (1<<31) | output_type | i; + iowrite32(ioread32(&opregion->acpi->didl[i]) | + (1<<31) | + output_type | + i, + &opregion->acpi->didl[i]); i++; } - /* If fewer than 8 outputs, the list must be null terminated */ + /* If fewer than 8 outputs, the list must be nul terminated */ if (i < 8) - opregion->acpi->didl[i] = 0; + iowrite32(0, &opregion->acpi->didl[i]); +} + +static bool +is_opregion_signature(u8 __iomem *sig) +{ + int i; + + for (i = 0; i < 16; i++) + if (ioread8(sig + i) != OPREGION_SIGNATURE[i]) + return false; + return true; } int intel_opregion_init(struct drm_device *dev, int resume) { struct drm_i915_private *dev_priv = dev->dev_private; struct intel_opregion *opregion = &dev_priv->opregion; - void *base; + void __iomem *base; u32 asls, mboxes; int err = 0; @@ -442,13 +455,13 @@ int intel_opregion_init(struct drm_device *dev, int resume) return -ENOMEM; opregion->header = base; - if (memcmp(opregion->header->signature, OPREGION_SIGNATURE, 16)) { + if (!is_opregion_signature(opregion->header->signature)) { DRM_DEBUG_DRIVER("opregion signature mismatch\n"); err = -EINVAL; goto err_out; } - mboxes = opregion->header->mboxes; + mboxes = ioread32(&opregion->header->mboxes); if (mboxes & MBOX_ACPI) { DRM_DEBUG_DRIVER("Public ACPI methods supported\n"); opregion->acpi = base + OPREGION_ACPI_OFFSET; @@ -478,8 +491,8 @@ int intel_opregion_init(struct drm_device *dev, int resume) /* Notify BIOS we are ready to handle ACPI video ext notifs. * Right now, all the events are handled by the ACPI video module. * We don't actually need to do anything with them. */ - opregion->acpi->csts = 0; - opregion->acpi->drdy = 1; + iowrite32(0, &opregion->acpi->csts); + iowrite32(1, &opregion->acpi->drdy); system_opregion = opregion; register_acpi_notifier(&intel_opregion_notifier); @@ -503,7 +516,7 @@ void intel_opregion_free(struct drm_device *dev, int suspend) if (!suspend) acpi_video_unregister(); - opregion->acpi->drdy = 0; + iowrite32(0, &opregion->acpi->drdy); system_opregion = NULL; unregister_acpi_notifier(&intel_opregion_notifier);