From patchwork Thu Mar 11 15:58:57 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 84951 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o2BFxTVE010779 for ; Thu, 11 Mar 2010 16:00:09 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B567B9F783; Thu, 11 Mar 2010 07:59:13 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail.ffwll.ch (cable-static-49-187.intergga.ch [157.161.49.187]) by gabe.freedesktop.org (Postfix) with ESMTP id CE3CF9F77B for ; Thu, 11 Mar 2010 07:59:09 -0800 (PST) Received: by mail.ffwll.ch (Postfix, from userid 1000) id F3EEE20C22D; Thu, 11 Mar 2010 16:59:08 +0100 (CET) X-Spam-ASN: X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on orange.ffwll.ch X-Spam-Level: X-Spam-Hammy: 0.000-+--struct, 0.000-+--100644, 0.000-+--signed-off-by X-Spam-Status: No, score=-4.4 required=6.0 tests=ALL_TRUSTED,BAYES_00 autolearn=ham version=3.2.5 X-Spam-Spammy: 0.958-+--H*m:ffwll, 0.956-+--H*r:mail.ffwll.ch, 0.955-+--H*Ad:U*daniel.vetter Received: from biene (unknown [192.168.23.129]) by mail.ffwll.ch (Postfix) with ESMTP id D3BB720C228; Thu, 11 Mar 2010 16:58:36 +0100 (CET) Received: from daniel by biene with local (Exim 4.71) (envelope-from ) id 1Npkmv-000391-HJ; Thu, 11 Mar 2010 16:59:05 +0100 From: Daniel Vetter To: intel-gfx@lists.freedesktop.org Date: Thu, 11 Mar 2010 16:58:57 +0100 Message-Id: <1268323140-12006-13-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.6.6.1 In-Reply-To: <1268323140-12006-1-git-send-email-daniel.vetter@ffwll.ch> References: <1268323140-12006-1-git-send-email-daniel.vetter@ffwll.ch> Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 12/15] drm/i915: optimize fence-stealing for execbuf2 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Thu, 11 Mar 2010 16:00:09 +0000 (UTC) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 4bf8bf7..4102af6 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2643,8 +2643,8 @@ int i915_gem_object_put_fence_reg(struct drm_gem_object *obj, int pipelined) { - struct drm_device *dev = obj->dev; struct drm_i915_gem_object *obj_priv = obj->driver_private; + int ret; if (obj_priv->fence_reg == I915_FENCE_REG_NONE) return 0; @@ -2655,18 +2655,24 @@ i915_gem_object_put_fence_reg(struct drm_gem_object *obj, */ i915_gem_release_mmap(obj); - /* On the i915, GPU access to tiled buffers is via a fence, - * therefore we must wait for any outstanding access to complete - * before clearing the fence. - */ - if (!IS_I965G(dev)) { - int ret; - - ret = i915_gem_object_flush_gpu_write_domain(obj, pipelined); + if (obj_priv->fenced_gpu_access) { + ret = i915_gem_object_flush_gpu_write_domain(obj, 1); if (ret != 0) return ret; } + if (!pipelined) { + struct drm_device *dev = obj->dev; + drm_i915_private_t *dev_priv = dev->dev_private; + struct drm_i915_fence_reg *reg = + &dev_priv->fence_regs[obj_priv->fence_reg]; + if (reg->last_rendering_seqno != 0) { + ret = i915_wait_request(dev, reg->last_rendering_seqno); + if (ret != 0) + return ret; + } + } + i915_gem_object_flush_gtt_write_domain(obj); i915_gem_clear_fence_reg(obj, pipelined);