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[4/4] agp/intel-gtt: extract mch buffer flush in i830 chipset flush

Message ID 1273405286-3560-5-git-send-email-daniel.vetter@ffwll.ch (mailing list archive)
State Deferred, archived
Headers show

Commit Message

Daniel Vetter May 9, 2010, 11:41 a.m. UTC
None
diff mbox

Patch

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index bed0ed6..0277314 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -808,6 +808,20 @@  setup:
 	intel_private.i8xx_cache_flush_num = 0;
 }
 
+static void intel_flush_mch_write_buffer(void)
+{
+	memset(intel_private.i8xx_cpu_flush_page, 0,
+	       I830_MCH_WRITE_BUFFER_SIZE);
+
+	mb();
+	if (cpu_has_clflush) {
+		clflush_cache_range(intel_private.i8xx_cpu_flush_page,
+				    I830_MCH_WRITE_BUFFER_SIZE);
+	} else if (wbinvd_on_all_cpus() != 0)
+		printk(KERN_ERR "Timed out waiting for cache flush.\n");
+	mb();
+}
+
 /* The chipset_flush interface needs to get data that has already been
  * flushed out of the CPU all the way out to main memory, because the GPU
  * doesn't snoop those buffers.
@@ -846,14 +860,8 @@  static void intel_i830_chipset_flush(struct agp_bridge_data *bridge)
 			intel_private.i8xx_gtt_cc_pages + offset1);
 	mb();
 
-	memset(intel_private.i8xx_cpu_flush_page, 0,
-	       I830_MCH_WRITE_BUFFER_SIZE);
-
-	if (cpu_has_clflush) {
-		clflush_cache_range(intel_private.i8xx_cpu_flush_page,
-				    I830_MCH_WRITE_BUFFER_SIZE);
-	} else if (wbinvd_on_all_cpus() != 0)
-		printk(KERN_ERR "Timed out waiting for cache flush.\n");
+	/* start chipset flush */
+	intel_flush_mch_write_buffer();
 
 	/* read check values */
 	mb();